From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com> To: tudor.ambarus@microchip.com, p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, aidanmacdonald.0x0@gmail.com, tmn505@gmail.com, paul@crapouillou.net, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, jinghui.liu@ingenic.com, sernia.zhou@foxmail.com, reimu@sudomaker.com Subject: [PATCH 1/3] mtd: spi-nor: Use the spi-mem poll status APIs. Date: Sat, 23 Jul 2022 00:48:28 +0800 [thread overview] Message-ID: <1658508510-15400-2-git-send-email-zhouyanjie@wanyeetech.com> (raw) In-Reply-To: <1658508510-15400-1-git-send-email-zhouyanjie@wanyeetech.com> With advanced controllers (such as Ingenic SFC), it is possible to poll the status register of the device. This could be done to offload the CPU during a erase or write operation. Make use of spi-mem poll status APIs to handle this feature. Previously, when erasing large area (e.g. 32MiB), in non-offload case, CPU load could reach ~90% and would generate ~3.92 million interrupts, now it decrease to ~15% CPU load and 0.15 million interrupts. This should also fix the high CPU usage for system which don't have a dedicated poll status block logic (decrease to ~80% CPU load and ~1.61 million interrupts.). Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> --- drivers/mtd/spi-nor/core.c | 42 ++++++++++++++++++++++++++++++++---------- 1 file changed, 32 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 502967c..6a31132 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -617,19 +617,41 @@ static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, unsigned long deadline; int timeout = 0, ret; - deadline = jiffies + timeout_jiffies; + if (nor->spimem && !nor->params->ready) { + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, nor->bouncebuf, 0)); - while (!timeout) { - if (time_after_eq(jiffies, deadline)) - timeout = 1; + if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) { + op.addr.nbytes = nor->params->rdsr_addr_nbytes; + op.dummy.nbytes = nor->params->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, + * read 2 and then discard the second byte. + */ + op.data.nbytes = 2; + } - ret = spi_nor_ready(nor); - if (ret < 0) - return ret; - if (ret) - return 0; + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + return spi_mem_poll_status(nor->spimem, &op, SR_WIP, 0, 0, 10, + jiffies_to_msecs(timeout_jiffies)); + } else { + deadline = jiffies + timeout_jiffies; - cond_resched(); + while (!timeout) { + if (time_after_eq(jiffies, deadline)) + timeout = 1; + + ret = spi_nor_ready(nor); + if (ret < 0) + return ret; + if (ret) + return 0; + + cond_resched(); + } } dev_dbg(nor->dev, "flash operation timed out\n"); -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com> To: tudor.ambarus@microchip.com, p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, aidanmacdonald.0x0@gmail.com, tmn505@gmail.com, paul@crapouillou.net, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, jinghui.liu@ingenic.com, sernia.zhou@foxmail.com, reimu@sudomaker.com Subject: [PATCH 1/3] mtd: spi-nor: Use the spi-mem poll status APIs. Date: Sat, 23 Jul 2022 00:48:28 +0800 [thread overview] Message-ID: <1658508510-15400-2-git-send-email-zhouyanjie@wanyeetech.com> (raw) In-Reply-To: <1658508510-15400-1-git-send-email-zhouyanjie@wanyeetech.com> With advanced controllers (such as Ingenic SFC), it is possible to poll the status register of the device. This could be done to offload the CPU during a erase or write operation. Make use of spi-mem poll status APIs to handle this feature. Previously, when erasing large area (e.g. 32MiB), in non-offload case, CPU load could reach ~90% and would generate ~3.92 million interrupts, now it decrease to ~15% CPU load and 0.15 million interrupts. This should also fix the high CPU usage for system which don't have a dedicated poll status block logic (decrease to ~80% CPU load and ~1.61 million interrupts.). Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> --- drivers/mtd/spi-nor/core.c | 42 ++++++++++++++++++++++++++++++++---------- 1 file changed, 32 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 502967c..6a31132 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -617,19 +617,41 @@ static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, unsigned long deadline; int timeout = 0, ret; - deadline = jiffies + timeout_jiffies; + if (nor->spimem && !nor->params->ready) { + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, nor->bouncebuf, 0)); - while (!timeout) { - if (time_after_eq(jiffies, deadline)) - timeout = 1; + if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) { + op.addr.nbytes = nor->params->rdsr_addr_nbytes; + op.dummy.nbytes = nor->params->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, + * read 2 and then discard the second byte. + */ + op.data.nbytes = 2; + } - ret = spi_nor_ready(nor); - if (ret < 0) - return ret; - if (ret) - return 0; + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + return spi_mem_poll_status(nor->spimem, &op, SR_WIP, 0, 0, 10, + jiffies_to_msecs(timeout_jiffies)); + } else { + deadline = jiffies + timeout_jiffies; - cond_resched(); + while (!timeout) { + if (time_after_eq(jiffies, deadline)) + timeout = 1; + + ret = spi_nor_ready(nor); + if (ret < 0) + return ret; + if (ret) + return 0; + + cond_resched(); + } } dev_dbg(nor->dev, "flash operation timed out\n"); -- 2.7.4 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-07-22 16:49 UTC|newest] Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-22 16:48 [PATCH 0/3] Add SFC support for Ingenic SoCs 周琰杰 (Zhou Yanjie) 2022-07-22 16:48 ` 周琰杰 (Zhou Yanjie) 2022-07-22 16:48 ` 周琰杰 (Zhou Yanjie) [this message] 2022-07-22 16:48 ` [PATCH 1/3] mtd: spi-nor: Use the spi-mem poll status APIs 周琰杰 (Zhou Yanjie) 2022-07-23 8:30 ` Sergey Shtylyov 2022-07-23 8:30 ` Sergey Shtylyov 2022-07-22 16:48 ` [PATCH 2/3] dt-bindings: SPI: Add Ingenic SFC bindings 周琰杰 (Zhou Yanjie) 2022-07-22 16:48 ` 周琰杰 (Zhou Yanjie) 2022-07-22 17:46 ` Krzysztof Kozlowski 2022-07-22 17:46 ` Krzysztof Kozlowski 2022-07-23 16:50 ` Zhou Yanjie 2022-07-23 16:50 ` Zhou Yanjie 2022-07-23 17:43 ` Krzysztof Kozlowski 2022-07-23 17:43 ` Krzysztof Kozlowski 2022-07-23 18:47 ` Mike Yang 2022-07-23 18:47 ` Mike Yang 2022-07-23 19:27 ` Mark Brown 2022-07-23 19:27 ` Mark Brown 2022-07-23 20:07 ` Krzysztof Kozlowski 2022-07-23 20:07 ` Krzysztof Kozlowski 2022-07-23 20:49 ` Mike Yang 2022-07-23 20:49 ` Mike Yang 2022-07-24 15:33 ` Zhou Yanjie 2022-07-24 15:33 ` Zhou Yanjie 2022-07-25 18:30 ` Rob Herring 2022-07-25 18:30 ` Rob Herring 2022-07-23 20:05 ` Krzysztof Kozlowski 2022-07-23 20:05 ` Krzysztof Kozlowski 2022-07-24 14:52 ` Zhou Yanjie 2022-07-24 14:52 ` Zhou Yanjie 2022-07-22 22:44 ` Rob Herring 2022-07-22 22:44 ` Rob Herring 2022-07-22 16:48 ` [PATCH 3/3] SPI: Ingenic: Add SFC support for Ingenic SoCs 周琰杰 (Zhou Yanjie) 2022-07-22 16:48 ` 周琰杰 (Zhou Yanjie) 2022-07-22 18:07 ` Krzysztof Kozlowski 2022-07-22 18:07 ` Krzysztof Kozlowski 2022-07-23 16:53 ` Zhou Yanjie 2022-07-23 16:53 ` Zhou Yanjie 2022-07-22 18:38 ` Mark Brown 2022-07-22 18:38 ` Mark Brown 2022-07-23 17:06 ` Zhou Yanjie 2022-07-23 17:06 ` Zhou Yanjie 2022-07-23 19:32 ` Mark Brown 2022-07-23 19:32 ` Mark Brown 2022-07-24 1:24 ` Zhou Yanjie 2022-07-24 1:24 ` Zhou Yanjie 2022-07-22 20:03 ` Paul Cercueil 2022-07-22 20:03 ` Paul Cercueil 2022-07-23 17:26 ` Zhou Yanjie 2022-07-23 17:26 ` Zhou Yanjie 2022-07-23 20:24 ` Paul Cercueil 2022-07-23 20:24 ` Paul Cercueil 2022-07-24 15:29 ` Zhou Yanjie 2022-07-24 15:29 ` Zhou Yanjie 2022-07-23 15:15 ` Christophe JAILLET 2022-07-23 15:15 ` Christophe JAILLET 2022-07-23 15:15 ` Christophe JAILLET 2022-07-24 1:22 ` Zhou Yanjie 2022-07-24 1:22 ` Zhou Yanjie 2022-07-24 0:43 ` kernel test robot 2022-07-24 0:43 ` kernel test robot 2022-07-24 1:28 ` Vanessa Page 2022-07-24 1:28 ` Vanessa Page 2022-07-25 16:58 ` Vanessa Page 2022-07-23 14:47 ` [PATCH 0/3] " Tomasz Maciej Nowak 2022-07-23 14:47 ` Tomasz Maciej Nowak 2022-07-24 1:25 ` Zhou Yanjie 2022-07-24 1:25 ` Zhou Yanjie 2022-07-24 1:28 ` Vanessa Page 2022-07-24 1:28 ` Vanessa Page 2022-07-24 1:28 ` Vanessa Page 2022-07-24 1:28 ` Vanessa Page 2022-07-24 1:30 ` Vanessa Page 2022-07-24 1:30 ` Vanessa Page 2022-07-24 1:32 ` Vee Page 2022-07-24 1:32 ` Vee Page 2022-07-26 6:13 ` Vee Page 2022-07-26 6:13 ` Vee Page
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