From: Amrit Anand <quic_amrianan@quicinc.com> To: <robh@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org> Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <kernel@quicinc.com>, <peter.griffin@linaro.org>, <caleb.connolly@linaro.org>, <linux-riscv@lists.infradead.org>, <chrome-platform@lists.linux.dev>, <linux-mediatek@lists.infradead.org>, Amrit Anand <quic_amrianan@quicinc.com> Subject: [PATCH v2 1/2] dt-bindings: arm: qcom: Update Devicetree identifiers Date: Thu, 14 Mar 2024 17:41:51 +0530 [thread overview] Message-ID: <1710418312-6559-2-git-send-email-quic_amrianan@quicinc.com> (raw) In-Reply-To: <1710418312-6559-1-git-send-email-quic_amrianan@quicinc.com> Update existing documentation for qcom,msm-id (interchangeably: qcom,soc-id) and qcom,board-id. Add support for qcom,pmic-id, qcom,oem-id to support multi-DTB selection on Qualcomm's boards. "qcom,soc-id", "qcom,board-id" and "qcom,pmic-id" are tuples of two 32-bit values. The "qcom,oem-id" is a tuple of one 32-bit value. Introduce macros to help generate SOC, board, PMIC and OEM identifiers. QCOM_SOC_ID and QCOM_SOC_REVISION can be used to generate qcom,msm-id. QCOM_BOARD_ID and QCOM_BOARD_SUBTYPE can be used to generate qcom,board-id. QCOM_PMIC_SID and QCOM_PMIC_MODEL can be used to generate qcom,pmic-id. QCOM_OEM_ID can be used to generate qcom,oem-id. Add entries for different types of SoC, boards, DDR type, Boot device type which are currently used by Qualcomm based bootloader. Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com> --- include/dt-bindings/arm/qcom,ids.h | 86 ++++++++++++++++++++++++++++++++++---- 1 file changed, 77 insertions(+), 9 deletions(-) diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index f724834..dc24151 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -8,9 +8,14 @@ #define _DT_BINDINGS_ARM_QCOM_IDS_H /* - * The MSM chipset and hardware revision used by Qualcomm bootloaders, DTS for - * older chipsets (qcom,msm-id) and in socinfo driver: + * The MSM chipset ID (soc-id) used by Qualcomm bootloaders, + * and in socinfo driver: + * where, "a" indicates Qualcomm supported chipsets, example MSM8260, MSM8660 etc */ + +#define QCOM_SOC_ID(a) ((QCOM_ID_##a) && 0xffff) + + #define QCOM_ID_MSM8260 70 #define QCOM_ID_MSM8660 71 #define QCOM_ID_APQ8060 86 @@ -266,16 +271,79 @@ #define QCOM_ID_IPQ5302 595 #define QCOM_ID_IPQ5300 624 + /* The SOC revision used by Qualcomm bootloaders (soc-revision) */ + +#define QCOM_SOC_REVISION(a) (a & 0xff) + /* - * The board type and revision information, used by Qualcomm bootloaders and - * DTS for older chipsets (qcom,board-id): + * The board type and revision information (board-id), used by Qualcomm bootloaders + * where, "a" indicates board type which can be either MTP, QRD etc */ + #define QCOM_BOARD_ID(a, major, minor) \ - (((major & 0xff) << 16) | ((minor & 0xff) << 8) | QCOM_BOARD_ID_##a) + (((major & 0xff) << 16) | ((minor & 0xff) << 8) | ((QCOM_BOARD_ID_##a) & 0xff)) + +#define QCOM_BOARD_ID_MTP 0x8 +#define QCOM_BOARD_ID_LIQUID 0x9 +#define QCOM_BOARD_ID_DRAGONBOARD 0xA +#define QCOM_BOARD_ID_QRD 0x11 +#define QCOM_BOARD_ID_ADP 0x19 +#define QCOM_BOARD_ID_HDK 0x1F +#define QCOM_BOARD_ID_ATP 0x21 +#define QCOM_BOARD_ID_IDP 0x22 +#define QCOM_BOARD_ID_SBC 0x24 +#define QCOM_BOARD_ID_QXR 0x26 +#define QCOM_BOARD_ID_X100 0x26 +#define QCOM_BOARD_ID_CRD 0x28 + +/* + * The platform subtype is used by Qualcomm bootloaders and + * DTS (board-subtype) + * where, "a" indicates boot device type, it can be EMMC, + * UFS, NAND or OTHER (which can be used for default). + * "b" indicates DDR type which can be 128MB, 256MB, + * 512MB, 1024MB, 2048MB, 3072MB, 4096MB or ANY + * (which can be used for default). + */ +#define QCOM_BOARD_SUBTYPE(a, b, SUBTYPE) \ + (((QCOM_BOARD_BOOT_##a & 0xf) << 16) | ((QCOM_BOARD_DDRTYPE_##b & 0x7) << 8) | \ + (SUBTYPE & 0xff)) + +/* Board DDR Type where each value indicates higher limit */ +#define QCOM_BOARD_DDRTYPE_ANY 0x0 +#define QCOM_BOARD_DDRTYPE_128M 0x1 +#define QCOM_BOARD_DDRTYPE_256M 0x2 +#define QCOM_BOARD_DDRTYPE_512M 0x3 +#define QCOM_BOARD_DDRTYPE_1024M 0x4 +#define QCOM_BOARD_DDRTYPE_2048M 0x5 +#define QCOM_BOARD_DDRTYPE_3072M 0x6 +#define QCOM_BOARD_DDRTYPE_4096M 0x7 -#define QCOM_BOARD_ID_MTP 8 -#define QCOM_BOARD_ID_DRAGONBOARD 10 -#define QCOM_BOARD_ID_QRD 11 -#define QCOM_BOARD_ID_SBC 24 +/* Board Boot Device Type */ +#define QCOM_BOARD_BOOT_EMMC 0x0 +#define QCOM_BOARD_BOOT_UFS 0x1 +#define QCOM_BOARD_BOOT_NAND 0x2 +#define QCOM_BOARD_BOOT_OTHER 0x3 + +/* + * The PMIC slave id is used by Qualcomm bootloaders to + * indicates which PMIC is attached (pmic-sid) + */ + +#define QCOM_PMIC_SID(a) (a & 0xff) + +/* + * The PMIC ID is used by Qualcomm bootloaders to describe the ID + * of PMIC attached to bus described by SID (pmic-model) + */ + +#define QCOM_PMIC_MODEL(ID, major, minor) \ + (((major & 0xff) << 16) | ((minor & 0xff) << 8) | (ID & 0xff)) + +/* + * The OEM ID consists of 32 bit value to support OEM boards where they + * have slight differences on top of Qualcomm's standard boards + */ +#define QCOM_OEM_ID(a) (a & 0xffffffff) #endif /* _DT_BINDINGS_ARM_QCOM_IDS_H */ -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Amrit Anand <quic_amrianan@quicinc.com> To: <robh@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org> Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <kernel@quicinc.com>, <peter.griffin@linaro.org>, <caleb.connolly@linaro.org>, <linux-riscv@lists.infradead.org>, <chrome-platform@lists.linux.dev>, <linux-mediatek@lists.infradead.org>, Amrit Anand <quic_amrianan@quicinc.com> Subject: [PATCH v2 1/2] dt-bindings: arm: qcom: Update Devicetree identifiers Date: Thu, 14 Mar 2024 17:41:51 +0530 [thread overview] Message-ID: <1710418312-6559-2-git-send-email-quic_amrianan@quicinc.com> (raw) In-Reply-To: <1710418312-6559-1-git-send-email-quic_amrianan@quicinc.com> Update existing documentation for qcom,msm-id (interchangeably: qcom,soc-id) and qcom,board-id. Add support for qcom,pmic-id, qcom,oem-id to support multi-DTB selection on Qualcomm's boards. "qcom,soc-id", "qcom,board-id" and "qcom,pmic-id" are tuples of two 32-bit values. The "qcom,oem-id" is a tuple of one 32-bit value. Introduce macros to help generate SOC, board, PMIC and OEM identifiers. QCOM_SOC_ID and QCOM_SOC_REVISION can be used to generate qcom,msm-id. QCOM_BOARD_ID and QCOM_BOARD_SUBTYPE can be used to generate qcom,board-id. QCOM_PMIC_SID and QCOM_PMIC_MODEL can be used to generate qcom,pmic-id. QCOM_OEM_ID can be used to generate qcom,oem-id. Add entries for different types of SoC, boards, DDR type, Boot device type which are currently used by Qualcomm based bootloader. Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com> --- include/dt-bindings/arm/qcom,ids.h | 86 ++++++++++++++++++++++++++++++++++---- 1 file changed, 77 insertions(+), 9 deletions(-) diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index f724834..dc24151 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -8,9 +8,14 @@ #define _DT_BINDINGS_ARM_QCOM_IDS_H /* - * The MSM chipset and hardware revision used by Qualcomm bootloaders, DTS for - * older chipsets (qcom,msm-id) and in socinfo driver: + * The MSM chipset ID (soc-id) used by Qualcomm bootloaders, + * and in socinfo driver: + * where, "a" indicates Qualcomm supported chipsets, example MSM8260, MSM8660 etc */ + +#define QCOM_SOC_ID(a) ((QCOM_ID_##a) && 0xffff) + + #define QCOM_ID_MSM8260 70 #define QCOM_ID_MSM8660 71 #define QCOM_ID_APQ8060 86 @@ -266,16 +271,79 @@ #define QCOM_ID_IPQ5302 595 #define QCOM_ID_IPQ5300 624 + /* The SOC revision used by Qualcomm bootloaders (soc-revision) */ + +#define QCOM_SOC_REVISION(a) (a & 0xff) + /* - * The board type and revision information, used by Qualcomm bootloaders and - * DTS for older chipsets (qcom,board-id): + * The board type and revision information (board-id), used by Qualcomm bootloaders + * where, "a" indicates board type which can be either MTP, QRD etc */ + #define QCOM_BOARD_ID(a, major, minor) \ - (((major & 0xff) << 16) | ((minor & 0xff) << 8) | QCOM_BOARD_ID_##a) + (((major & 0xff) << 16) | ((minor & 0xff) << 8) | ((QCOM_BOARD_ID_##a) & 0xff)) + +#define QCOM_BOARD_ID_MTP 0x8 +#define QCOM_BOARD_ID_LIQUID 0x9 +#define QCOM_BOARD_ID_DRAGONBOARD 0xA +#define QCOM_BOARD_ID_QRD 0x11 +#define QCOM_BOARD_ID_ADP 0x19 +#define QCOM_BOARD_ID_HDK 0x1F +#define QCOM_BOARD_ID_ATP 0x21 +#define QCOM_BOARD_ID_IDP 0x22 +#define QCOM_BOARD_ID_SBC 0x24 +#define QCOM_BOARD_ID_QXR 0x26 +#define QCOM_BOARD_ID_X100 0x26 +#define QCOM_BOARD_ID_CRD 0x28 + +/* + * The platform subtype is used by Qualcomm bootloaders and + * DTS (board-subtype) + * where, "a" indicates boot device type, it can be EMMC, + * UFS, NAND or OTHER (which can be used for default). + * "b" indicates DDR type which can be 128MB, 256MB, + * 512MB, 1024MB, 2048MB, 3072MB, 4096MB or ANY + * (which can be used for default). + */ +#define QCOM_BOARD_SUBTYPE(a, b, SUBTYPE) \ + (((QCOM_BOARD_BOOT_##a & 0xf) << 16) | ((QCOM_BOARD_DDRTYPE_##b & 0x7) << 8) | \ + (SUBTYPE & 0xff)) + +/* Board DDR Type where each value indicates higher limit */ +#define QCOM_BOARD_DDRTYPE_ANY 0x0 +#define QCOM_BOARD_DDRTYPE_128M 0x1 +#define QCOM_BOARD_DDRTYPE_256M 0x2 +#define QCOM_BOARD_DDRTYPE_512M 0x3 +#define QCOM_BOARD_DDRTYPE_1024M 0x4 +#define QCOM_BOARD_DDRTYPE_2048M 0x5 +#define QCOM_BOARD_DDRTYPE_3072M 0x6 +#define QCOM_BOARD_DDRTYPE_4096M 0x7 -#define QCOM_BOARD_ID_MTP 8 -#define QCOM_BOARD_ID_DRAGONBOARD 10 -#define QCOM_BOARD_ID_QRD 11 -#define QCOM_BOARD_ID_SBC 24 +/* Board Boot Device Type */ +#define QCOM_BOARD_BOOT_EMMC 0x0 +#define QCOM_BOARD_BOOT_UFS 0x1 +#define QCOM_BOARD_BOOT_NAND 0x2 +#define QCOM_BOARD_BOOT_OTHER 0x3 + +/* + * The PMIC slave id is used by Qualcomm bootloaders to + * indicates which PMIC is attached (pmic-sid) + */ + +#define QCOM_PMIC_SID(a) (a & 0xff) + +/* + * The PMIC ID is used by Qualcomm bootloaders to describe the ID + * of PMIC attached to bus described by SID (pmic-model) + */ + +#define QCOM_PMIC_MODEL(ID, major, minor) \ + (((major & 0xff) << 16) | ((minor & 0xff) << 8) | (ID & 0xff)) + +/* + * The OEM ID consists of 32 bit value to support OEM boards where they + * have slight differences on top of Qualcomm's standard boards + */ +#define QCOM_OEM_ID(a) (a & 0xffffffff) #endif /* _DT_BINDINGS_ARM_QCOM_IDS_H */ -- 2.7.4 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-03-14 12:13 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-14 12:11 [PATCH v2 0/2] Add board-id support for multiple DT selection Amrit Anand 2024-03-14 12:11 ` Amrit Anand 2024-03-14 12:11 ` Amrit Anand [this message] 2024-03-14 12:11 ` [PATCH v2 1/2] dt-bindings: arm: qcom: Update Devicetree identifiers Amrit Anand 2024-03-14 14:29 ` Caleb Connolly 2024-03-14 14:29 ` Caleb Connolly 2024-05-07 5:07 ` Amrit Anand 2024-05-07 5:07 ` Amrit Anand 2024-03-14 12:11 ` [PATCH v2 2/2] dt-bindings: qcom: Update DT bindings for multiple DT Amrit Anand 2024-03-14 12:11 ` Amrit Anand 2024-03-14 13:35 ` Rob Herring 2024-03-14 13:35 ` Rob Herring 2024-03-14 14:20 ` Caleb Connolly 2024-03-14 14:20 ` Caleb Connolly 2024-03-14 14:35 ` Caleb Connolly 2024-03-14 14:35 ` Caleb Connolly 2024-03-14 20:07 ` Elliot Berman 2024-03-14 20:07 ` Elliot Berman 2024-03-16 16:20 ` Conor Dooley 2024-03-16 16:20 ` Conor Dooley 2024-03-16 16:51 ` Conor Dooley 2024-03-16 16:51 ` Conor Dooley 2024-03-18 21:36 ` Doug Anderson 2024-03-18 21:36 ` Doug Anderson 2024-03-28 5:49 ` Chen-Yu Tsai 2024-03-28 5:49 ` Chen-Yu Tsai 2024-03-28 8:50 ` [PATCH v2 0/2] Add board-id support for multiple DT selection Krzysztof Kozlowski 2024-03-28 8:50 ` Krzysztof Kozlowski
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