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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Daniel Vetter <daniel.vetter@intel.com>,
	David Airlie <airlied@linux.ie>, Chen-Yu Tsai <wens@csie.org>,
	Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org, plaes@plaes.org,
	icenowy@aosc.io,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	jernej.skrabec@siol.net, devicetree@vger.kernel.org
Subject: [PATCH v3 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
Date: Tue,  5 Dec 2017 16:10:15 +0100	[thread overview]
Message-ID: <17851ba6277b69aa9cd81de5eead62bfed271661.1512486553.git-series.maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <cover.825a49a4c1c565a548f3de0375e7537e7e8fd3a4.1512486553.git-series.maxime.ripard@free-electrons.com>
In-Reply-To: <cover.825a49a4c1c565a548f3de0375e7537e7e8fd3a4.1512486553.git-series.maxime.ripard@free-electrons.com>

Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.

Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 8 +++++++-
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 50cc72ee1168..d4259a4f5171 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -121,6 +121,14 @@ Required properties:
 On SoCs other than the A33 and V3s, there is one more clock required:
    - 'tcon-ch1': The clock driving the TCON channel 1
 
+On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
+need one more reset line:
+   - 'lvds': The reset line driving the LVDS logic
+
+And on the SoCs newer than the A31 (sun6i and sun8i families), you
+need one more clock line:
+   - 'lvds-pll': The PLL that can be used to drive the LVDS clock
+
 DRC
 ---
 
-- 
git-series 0.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Daniel Vetter <daniel.vetter@intel.com>,
	David Airlie <airlied@linux.ie>, Chen-Yu Tsai <wens@csie.org>,
	Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	jernej.skrabec@siol.net, plaes@plaes.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org, icenowy@aosc.io
Subject: [PATCH v3 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
Date: Tue,  5 Dec 2017 16:10:15 +0100	[thread overview]
Message-ID: <17851ba6277b69aa9cd81de5eead62bfed271661.1512486553.git-series.maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <cover.825a49a4c1c565a548f3de0375e7537e7e8fd3a4.1512486553.git-series.maxime.ripard@free-electrons.com>
In-Reply-To: <cover.825a49a4c1c565a548f3de0375e7537e7e8fd3a4.1512486553.git-series.maxime.ripard@free-electrons.com>

Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.

Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 8 +++++++-
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 50cc72ee1168..d4259a4f5171 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -121,6 +121,14 @@ Required properties:
 On SoCs other than the A33 and V3s, there is one more clock required:
    - 'tcon-ch1': The clock driving the TCON channel 1
 
+On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
+need one more reset line:
+   - 'lvds': The reset line driving the LVDS logic
+
+And on the SoCs newer than the A31 (sun6i and sun8i families), you
+need one more clock line:
+   - 'lvds-pll': The PLL that can be used to drive the LVDS clock
+
 DRC
 ---
 
-- 
git-series 0.9.1
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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties
Date: Tue,  5 Dec 2017 16:10:15 +0100	[thread overview]
Message-ID: <17851ba6277b69aa9cd81de5eead62bfed271661.1512486553.git-series.maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <cover.825a49a4c1c565a548f3de0375e7537e7e8fd3a4.1512486553.git-series.maxime.ripard@free-electrons.com>

Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.

Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 8 +++++++-
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 50cc72ee1168..d4259a4f5171 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -121,6 +121,14 @@ Required properties:
 On SoCs other than the A33 and V3s, there is one more clock required:
    - 'tcon-ch1': The clock driving the TCON channel 1
 
+On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
+need one more reset line:
+   - 'lvds': The reset line driving the LVDS logic
+
+And on the SoCs newer than the A31 (sun6i and sun8i families), you
+need one more clock line:
+   - 'lvds-pll': The PLL that can be used to drive the LVDS clock
+
 DRC
 ---
 
-- 
git-series 0.9.1

  parent reply	other threads:[~2017-12-05 15:10 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-05 15:10 [PATCH v3 00/15] drm/sun4i: Add A83t LVDS support Maxime Ripard
2017-12-05 15:10 ` Maxime Ripard
2017-12-05 15:10 ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 01/15] dt-bindings: panel: lvds: Document power-supply property Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-06 21:56   ` Rob Herring
2017-12-06 21:56     ` Rob Herring
2017-12-06 21:56     ` Rob Herring
2017-12-05 15:10 ` [PATCH v3 02/15] drm/panel: lvds: Add support for the " Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10 ` Maxime Ripard [this message]
2017-12-05 15:10   ` [PATCH v3 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-06 21:57   ` Rob Herring
2017-12-06 21:57     ` Rob Herring
2017-12-06 21:57     ` Rob Herring
2017-12-07  3:57   ` Chen-Yu Tsai
2017-12-07  3:57     ` Chen-Yu Tsai
2017-12-07  3:57     ` Chen-Yu Tsai
2017-12-05 15:10 ` [PATCH v3 04/15] dt-bindings: display: sun4i-drm: Add A83T pipeline Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-06 21:59   ` Rob Herring
2017-12-06 21:59     ` Rob Herring
2017-12-06 21:59     ` Rob Herring
2017-12-07  3:37     ` Chen-Yu Tsai
2017-12-07  3:37       ` Chen-Yu Tsai
2017-12-07  3:37       ` Chen-Yu Tsai
2017-12-05 15:10 ` [PATCH v3 05/15] drm/sun4i: Fix error path handling Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:42   ` Chen-Yu Tsai
2017-12-05 15:42     ` Chen-Yu Tsai
2017-12-05 15:42     ` Chen-Yu Tsai
2017-12-05 15:10 ` [PATCH v3 06/15] drm/sun4i: Force the mixer rate at 150MHz Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 07/15] drm/sun4i: Create minimal multipliers and dividers Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 08/15] drm/sun4i: Add LVDS support Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-07  6:05   ` Chen-Yu Tsai
2017-12-07  6:05     ` Chen-Yu Tsai
2017-12-07  6:05     ` Chen-Yu Tsai
2017-12-07 12:25     ` Maxime Ripard
2017-12-07 12:25       ` Maxime Ripard
2017-12-07 12:25       ` Maxime Ripard
2017-12-14  3:30       ` Chen-Yu Tsai
2017-12-14  3:30         ` Chen-Yu Tsai
2017-12-14  3:30         ` Chen-Yu Tsai
2017-12-14  9:37         ` Maxime Ripard
2017-12-14  9:37           ` Maxime Ripard
2017-12-07 10:14   ` Philippe Ombredanne
2017-12-07 10:14     ` Philippe Ombredanne
2017-12-07 10:14     ` Philippe Ombredanne
2017-12-07 10:50     ` Maxime Ripard
2017-12-07 10:50       ` Maxime Ripard
2017-12-07 10:50       ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 09/15] drm/sun4i: Add A83T support Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:42   ` Jernej Škrabec
2017-12-05 15:42     ` Jernej Škrabec
2017-12-06 16:37     ` Jernej Škrabec
2017-12-06 16:37       ` Jernej Škrabec
2017-12-07 10:55       ` Maxime Ripard
2017-12-07 10:55         ` Maxime Ripard
2017-12-07 10:55         ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 10/15] ARM: dts: sun8i: a83t: Add display pipeline Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-07  4:02   ` Chen-Yu Tsai
2017-12-07  4:02     ` Chen-Yu Tsai
2017-12-07  4:02     ` Chen-Yu Tsai
2017-12-05 15:10 ` [PATCH v3 11/15] ARM: dts: sun8i: a83t: Enable the PWM Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 12/15] ARM: dts: sun8i: a83t: Add LVDS pins group Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 13/15] ARM: dts: sun8i: a83t: Add the PWM pin group Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10 ` [PATCH v3 14/15] ARM: dts: sun8i: a711: Reinstate the PMIC compatible Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-07  3:34   ` Chen-Yu Tsai
2017-12-07  3:34     ` Chen-Yu Tsai
2017-12-07  3:34     ` Chen-Yu Tsai
2017-12-05 15:10 ` [PATCH v3 15/15] ARM: dts: sun8i: a711: Enable the LCD Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard
2017-12-05 15:10   ` Maxime Ripard

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