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From: "Tuukka.O Toivonen" <tuukka.o.toivonen@nokia.com>
To: Paul Walmsley <paul@pwsan.com>,
	"Hogander Jouni (Nokia-D/Tampere)" <jouni.hogander@nokia.com>
Cc: sailus@maxwell.research.nokia.com,
	"Cohen David.A (Nokia-D/Helsinki)" <david.cohen@nokia.com>,
	"Hurskainen Mikko (Nokia-D/Helsinki)"
	<mikko.hurskainen@nokia.com>,
	linux-omap@vger.kernel.org
Subject: [PATCH take 2] ARM: OMAP3: allow setting cam_mclk rate
Date: Thu, 2 Jul 2009 11:59:52 +0300	[thread overview]
Message-ID: <200907021159.53071.tuukka.o.toivonen@nokia.com> (raw)
In-Reply-To: <200907021156.25044.tuukka.o.toivonen@nokia.com>

This patch allows drivers to modify cam_mclk rate which is
used for generating external cam_xclka and cam_xclkb for cameras.

Signed-off-by: Tuukka Toivonen <tuukka.o.toivonen@nokia.com>
---
 arch/arm/mach-omap2/clock34xx.c |   18 ++++++++++++++++++
 arch/arm/mach-omap2/clock34xx.h |    2 ++
 2 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 045da92..667a608 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -898,6 +898,24 @@ static unsigned long omap3_clkoutx2_recalc(struct clk *clk)
 	return rate;
 }
 
+/* Clock control for OMAP3 camera */
+
+static int omap3_cam_mclk_set_rate(struct clk *clk, unsigned long rate)
+{
+	const unsigned int dpll4_rate = 864000000; /* Hz */
+	int clksel;
+
+	if (rate <= 0)
+		return -EINVAL;
+
+	clksel = (dpll4_rate + (rate>>1)) / rate;
+	clksel = clamp(clksel, 1, 16);
+	cm_write_mod_reg(clksel, OMAP3430_CAM_MOD, CM_CLKSEL);
+	clk->rate = dpll4_rate / clksel;
+
+	return 0;
+}
+
 /* Common clock code */
 
 /*
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index e433aec..cd9a0d3 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -37,6 +37,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk);
 static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
 static int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate);
 static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate);
+static int omap3_cam_mclk_set_rate(struct clk *clk, unsigned long rate);
 
 /* Maximum DPLL multiplier, divider values for OMAP3 */
 #define OMAP3_MAX_DPLL_MULT		2048
@@ -2089,6 +2090,7 @@ static struct clk cam_mclk = {
 	.enable_bit	= OMAP3430_EN_CAM_SHIFT,
 	.clkdm_name	= "cam_clkdm",
 	.recalc		= &followparent_recalc,
+	.set_rate	= &omap3_cam_mclk_set_rate,
 };
 
 static struct clk cam_ick = {
-- 
1.5.4.3


  reply	other threads:[~2009-07-02  9:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-07-01 11:27 [PATCH] ARM: OMAP3: allow setting cam_mclk rate Tuukka.O Toivonen
2009-07-02  7:44 ` Artem Bityutskiy
2009-07-02  8:56 ` Tuukka.O Toivonen
2009-07-02  8:59   ` Tuukka.O Toivonen [this message]
2009-08-06 11:18     ` [PATCH take 2] " Paul Walmsley

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