From: Zhenyu Wang <zhenyuw@linux.intel.com> To: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Vetter <daniel.vetter@intel.com>, Jani Nikula <jani.nikula@linux.intel.com>, Zhi Wang <zhi.a.wang@intel.com>, Zhenyu Wang <zhenyuw@linux.intel.com>, David Airlie <airlied@linux.ie>, Chris Wilson <chris@chris-wilson.co.uk>, igvt-g-dev@ml01.01.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] drm/i915/gvt: fix compilation Date: Sat, 22 Oct 2016 13:09:41 +0800 [thread overview] Message-ID: <20161022050941.q2wrkwqwob3izklg@zhen-hp.sh.intel.com> (raw) In-Reply-To: <20161021152620.3324407-2-arnd@arndb.de> [-- Attachment #1: Type: text/plain, Size: 3980 bytes --] On 2016.10.21 17:25:50 +0200, Arnd Bergmann wrote: > Two functions in the newly added gvt render code are obviously > broken, as they reference a variable without initialization and > don't reference another variable at all: > > drivers/gpu/drm/i915/gvt/render.c: In function ???intel_gvt_load_render_mmio???: > drivers/gpu/drm/i915/gvt/render.c:148:13: error: ???offset.reg??? may be used uninitialized in this function [-Werror=maybe-uninitialized] > drivers/gpu/drm/i915/gvt/render.c: In function ???intel_gvt_restore_render_mmio???: > drivers/gpu/drm/i915/gvt/render.c:185:13: error: ???offset.reg??? may be used uninitialized in this function [-Werror=maybe-uninitialized] > > This is probably not a correct fix, but it gets us a clean build > by removing the unused arrays and initializing the offset variable > to something that potentially might be correct. > > Fixes: 178657139307 ("drm/i915/gvt: vGPU context switch") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- I think the correct fix is like diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c index feebb65..cc23c3f 100644 --- a/drivers/gpu/drm/i915/gvt/render.c +++ b/drivers/gpu/drm/i915/gvt/render.c @@ -162,6 +162,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id) if (!IS_SKYLAKE(dev_priv)) return; + offset.reg = regs[ring_id]; for (i = 0; i < 64; i++) { gen9_render_mocs[ring_id][i] = I915_READ(offset); I915_WRITE(offset, vgpu_vreg(vgpu, offset)); @@ -199,6 +200,7 @@ static void restore_mocs(struct intel_vgpu *vgpu, int ring_id) if (!IS_SKYLAKE(dev_priv)) return; + offset.reg = regs[ring_id]; for (i = 0; i < 64; i++) { vgpu_vreg(vgpu, offset) = I915_READ(offset); I915_WRITE(offset, gen9_render_mocs[ring_id][i]); Thanks for pointing this out, it's a mistake during our code preparation for upstream. I'll queue this up. > drivers/gpu/drm/i915/gvt/render.c | 25 +++---------------------- > 1 file changed, 3 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c > index feebb65ba641..79e112288065 100644 > --- a/drivers/gpu/drm/i915/gvt/render.c > +++ b/drivers/gpu/drm/i915/gvt/render.c > @@ -147,29 +147,20 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id) > { > struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; > i915_reg_t offset, l3_offset; > - u32 regs[] = { > - [RCS] = 0xc800, > - [VCS] = 0xc900, > - [VCS2] = 0xca00, > - [BCS] = 0xcc00, > - [VECS] = 0xcb00, > - }; > int i; > > - if (WARN_ON(ring_id >= ARRAY_SIZE(regs))) > - return; > - > if (!IS_SKYLAKE(dev_priv)) > return; > > for (i = 0; i < 64; i++) { > + offset.reg = i * 4; > gen9_render_mocs[ring_id][i] = I915_READ(offset); > I915_WRITE(offset, vgpu_vreg(vgpu, offset)); > POSTING_READ(offset); > - offset.reg += 4; > } > > if (ring_id == RCS) { > + offset.reg = 64 * 4; > l3_offset.reg = 0xb020; > for (i = 0; i < 32; i++) { > gen9_render_mocs_L3[i] = I915_READ(l3_offset); > @@ -184,26 +175,16 @@ static void restore_mocs(struct intel_vgpu *vgpu, int ring_id) > { > struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; > i915_reg_t offset, l3_offset; > - u32 regs[] = { > - [RCS] = 0xc800, > - [VCS] = 0xc900, > - [VCS2] = 0xca00, > - [BCS] = 0xcc00, > - [VECS] = 0xcb00, > - }; > int i; > > - if (WARN_ON(ring_id >= ARRAY_SIZE(regs))) > - return; > - > if (!IS_SKYLAKE(dev_priv)) > return; > > for (i = 0; i < 64; i++) { > + offset.reg = i * 4; > vgpu_vreg(vgpu, offset) = I915_READ(offset); > I915_WRITE(offset, gen9_render_mocs[ring_id][i]); > POSTING_READ(offset); > - offset.reg += 4; > } > > if (ring_id == RCS) { > -- > 2.9.0 > -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 163 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Zhenyu Wang <zhenyuw@linux.intel.com> To: Arnd Bergmann <arnd@arndb.de> Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Daniel Vetter <daniel.vetter@intel.com>, Zhi Wang <zhi.a.wang@intel.com>, igvt-g-dev@lists.01.org Subject: Re: [PATCH 2/2] drm/i915/gvt: fix compilation Date: Sat, 22 Oct 2016 13:09:41 +0800 [thread overview] Message-ID: <20161022050941.q2wrkwqwob3izklg@zhen-hp.sh.intel.com> (raw) In-Reply-To: <20161021152620.3324407-2-arnd@arndb.de> [-- Attachment #1.1: Type: text/plain, Size: 3980 bytes --] On 2016.10.21 17:25:50 +0200, Arnd Bergmann wrote: > Two functions in the newly added gvt render code are obviously > broken, as they reference a variable without initialization and > don't reference another variable at all: > > drivers/gpu/drm/i915/gvt/render.c: In function ???intel_gvt_load_render_mmio???: > drivers/gpu/drm/i915/gvt/render.c:148:13: error: ???offset.reg??? may be used uninitialized in this function [-Werror=maybe-uninitialized] > drivers/gpu/drm/i915/gvt/render.c: In function ???intel_gvt_restore_render_mmio???: > drivers/gpu/drm/i915/gvt/render.c:185:13: error: ???offset.reg??? may be used uninitialized in this function [-Werror=maybe-uninitialized] > > This is probably not a correct fix, but it gets us a clean build > by removing the unused arrays and initializing the offset variable > to something that potentially might be correct. > > Fixes: 178657139307 ("drm/i915/gvt: vGPU context switch") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- I think the correct fix is like diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c index feebb65..cc23c3f 100644 --- a/drivers/gpu/drm/i915/gvt/render.c +++ b/drivers/gpu/drm/i915/gvt/render.c @@ -162,6 +162,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id) if (!IS_SKYLAKE(dev_priv)) return; + offset.reg = regs[ring_id]; for (i = 0; i < 64; i++) { gen9_render_mocs[ring_id][i] = I915_READ(offset); I915_WRITE(offset, vgpu_vreg(vgpu, offset)); @@ -199,6 +200,7 @@ static void restore_mocs(struct intel_vgpu *vgpu, int ring_id) if (!IS_SKYLAKE(dev_priv)) return; + offset.reg = regs[ring_id]; for (i = 0; i < 64; i++) { vgpu_vreg(vgpu, offset) = I915_READ(offset); I915_WRITE(offset, gen9_render_mocs[ring_id][i]); Thanks for pointing this out, it's a mistake during our code preparation for upstream. I'll queue this up. > drivers/gpu/drm/i915/gvt/render.c | 25 +++---------------------- > 1 file changed, 3 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c > index feebb65ba641..79e112288065 100644 > --- a/drivers/gpu/drm/i915/gvt/render.c > +++ b/drivers/gpu/drm/i915/gvt/render.c > @@ -147,29 +147,20 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id) > { > struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; > i915_reg_t offset, l3_offset; > - u32 regs[] = { > - [RCS] = 0xc800, > - [VCS] = 0xc900, > - [VCS2] = 0xca00, > - [BCS] = 0xcc00, > - [VECS] = 0xcb00, > - }; > int i; > > - if (WARN_ON(ring_id >= ARRAY_SIZE(regs))) > - return; > - > if (!IS_SKYLAKE(dev_priv)) > return; > > for (i = 0; i < 64; i++) { > + offset.reg = i * 4; > gen9_render_mocs[ring_id][i] = I915_READ(offset); > I915_WRITE(offset, vgpu_vreg(vgpu, offset)); > POSTING_READ(offset); > - offset.reg += 4; > } > > if (ring_id == RCS) { > + offset.reg = 64 * 4; > l3_offset.reg = 0xb020; > for (i = 0; i < 32; i++) { > gen9_render_mocs_L3[i] = I915_READ(l3_offset); > @@ -184,26 +175,16 @@ static void restore_mocs(struct intel_vgpu *vgpu, int ring_id) > { > struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; > i915_reg_t offset, l3_offset; > - u32 regs[] = { > - [RCS] = 0xc800, > - [VCS] = 0xc900, > - [VCS2] = 0xca00, > - [BCS] = 0xcc00, > - [VECS] = 0xcb00, > - }; > int i; > > - if (WARN_ON(ring_id >= ARRAY_SIZE(regs))) > - return; > - > if (!IS_SKYLAKE(dev_priv)) > return; > > for (i = 0; i < 64; i++) { > + offset.reg = i * 4; > vgpu_vreg(vgpu, offset) = I915_READ(offset); > I915_WRITE(offset, gen9_render_mocs[ring_id][i]); > POSTING_READ(offset); > - offset.reg += 4; > } > > if (ring_id == RCS) { > -- > 2.9.0 > -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 163 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2016-10-22 5:14 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-10-21 15:25 [PATCH 1/2] drm/i915/gvt: add ACPI and 64BIT dependencies Arnd Bergmann 2016-10-21 15:25 ` [PATCH 2/2] drm/i915/gvt: fix compilation Arnd Bergmann 2016-10-21 15:25 ` Arnd Bergmann 2016-10-22 5:09 ` Zhenyu Wang [this message] 2016-10-22 5:09 ` Zhenyu Wang 2016-10-21 16:47 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/gvt: add ACPI and 64BIT dependencies Patchwork 2016-10-22 5:06 ` [PATCH 1/2] " Zhenyu Wang 2016-10-22 5:06 ` Zhenyu Wang
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20161022050941.q2wrkwqwob3izklg@zhen-hp.sh.intel.com \ --to=zhenyuw@linux.intel.com \ --cc=airlied@linux.ie \ --cc=arnd@arndb.de \ --cc=chris@chris-wilson.co.uk \ --cc=daniel.vetter@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=igvt-g-dev@ml01.01.org \ --cc=intel-gfx@lists.freedesktop.org \ --cc=jani.nikula@linux.intel.com \ --cc=linux-kernel@vger.kernel.org \ --cc=zhi.a.wang@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.