From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org> To: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>, Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>, Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>, Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>, Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org> Subject: [PATCH v2 2/2] arm64: allwinner: Kconfig: add essential pinctrl driver for H5 Date: Mon, 26 Dec 2016 17:31:27 +0800 [thread overview] Message-ID: <20161226093127.5525-2-icenowy@aosc.xyz> (raw) In-Reply-To: <20161226093127.5525-1-icenowy-ymACFijhrKM@public.gmane.org> H5 SoC has two pin controllers, one (in user manual called "CPUx") needs a slightly advanced driver, and the other (called "CPUs") is just equal to the on in H3, and the H3 driver can be just reused. Select the two necessary pinctrl drivers when building kernel for Allwinner SoCs. Also add H5 in the option's description. Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org> --- arch/arm64/Kconfig.platforms | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 715ef1256838..e11523d204b5 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -5,8 +5,11 @@ config ARCH_SUNXI select GENERIC_IRQ_CHIP select PINCTRL select PINCTRL_SUN50I_A64 + select PINCTRL_SUN50I_H5 + select PINCTRL_SUN8I_H3_R help - This enables support for Allwinner sunxi based SoCs like the A64. + This enables support for Allwinner sunxi based SoCs like the A64 + and H5. config ARCH_ALPINE bool "Annapurna Labs Alpine platform" -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.xyz (Icenowy Zheng) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] arm64: allwinner: Kconfig: add essential pinctrl driver for H5 Date: Mon, 26 Dec 2016 17:31:27 +0800 [thread overview] Message-ID: <20161226093127.5525-2-icenowy@aosc.xyz> (raw) In-Reply-To: <20161226093127.5525-1-icenowy@aosc.xyz> H5 SoC has two pin controllers, one (in user manual called "CPUx") needs a slightly advanced driver, and the other (called "CPUs") is just equal to the on in H3, and the H3 driver can be just reused. Select the two necessary pinctrl drivers when building kernel for Allwinner SoCs. Also add H5 in the option's description. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> --- arch/arm64/Kconfig.platforms | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 715ef1256838..e11523d204b5 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -5,8 +5,11 @@ config ARCH_SUNXI select GENERIC_IRQ_CHIP select PINCTRL select PINCTRL_SUN50I_A64 + select PINCTRL_SUN50I_H5 + select PINCTRL_SUN8I_H3_R help - This enables support for Allwinner sunxi based SoCs like the A64. + This enables support for Allwinner sunxi based SoCs like the A64 + and H5. config ARCH_ALPINE bool "Annapurna Labs Alpine platform" -- 2.11.0
next prev parent reply other threads:[~2016-12-26 9:31 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-12-26 9:31 [PATCH v2 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC Icenowy Zheng 2016-12-26 9:31 ` Icenowy Zheng [not found] ` <20161226093127.5525-1-icenowy-ymACFijhrKM@public.gmane.org> 2016-12-26 9:31 ` Icenowy Zheng [this message] 2016-12-26 9:31 ` [PATCH v2 2/2] arm64: allwinner: Kconfig: add essential pinctrl driver for H5 Icenowy Zheng
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20161226093127.5525-2-icenowy@aosc.xyz \ --to=icenowy-ymacfijhrkm@public.gmane.org \ --cc=andre.przywara-5wv7dgnIgG8@public.gmane.org \ --cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \ --cc=linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org \ --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org \ --cc=maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org \ --cc=wens-jdAy2FN1RRM@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.