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From: Chris Wilson <chris@chris-wilson.co.uk>
To: mesa-dev@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Chad Versace <chadversary@chromium.org>,
	Kenneth Graunke <kenneth@whitecape.org>,
	intel-gfx@lists.freedesktop.org
Subject: [PATCH] i965: Share the workaround bo between all contexts
Date: Thu, 26 Jan 2017 10:58:58 +0000	[thread overview]
Message-ID: <20170126105858.25769-1-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20170126103240.GB19521@nuc-i3427.alporthouse.com>

Since the workaround bo is used strictly as a write-only buffer, we need
only allocate one per screen and use the same one from all contexts.

(The caveat here is during extension initialisation, where we write into
and read back register values from the buffer, but that is performed only
once for the first context - and baring synchronisation issues should not
be a problem. Safer would be to move that also to the screen.)

v2: Give the workaround bo its own init function and don't piggy back
intel_bufmgr_init() since it is not that related.

v3: Drop the reference count of the workaround bo for the context since
the context itself is owned by the screen (and so we can rely on the bo
existing for the lifetime of the context).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Chad Versace <chadversary@chromium.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 src/mesa/drivers/dri/i965/Makefile.am        |  2 +-
 src/mesa/drivers/dri/i965/brw_pipe_control.c | 12 +++++-----
 src/mesa/drivers/dri/i965/intel_screen.c     | 24 ++++++++++++++++++++
 src/mesa/drivers/dri/i965/intel_screen.h     |  1 +
 src/mesa/drivers/dri/i965/libdrm_compat.h    | 33 ++++++++++++++++++++++++++++
 5 files changed, 64 insertions(+), 8 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/libdrm_compat.h

diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am
index 6602a17995..b208563f7d 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -77,7 +77,7 @@ noinst_LTLIBRARIES = \
 	libi965_compiler.la \
 	$(I965_PERGEN_LIBS)
 
-libi965_dri_la_SOURCES = $(i965_FILES)
+libi965_dri_la_SOURCES = $(i965_FILES) libdrm_compat.h
 libi965_dri_la_LIBADD = \
 	$(top_builddir)/src/intel/common/libintel_common.la \
 	$(top_builddir)/src/intel/isl/libisl.la \
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index b8f740640f..22c946f744 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -371,20 +371,18 @@ brw_init_pipe_control(struct brw_context *brw,
    /* We can't just use brw_state_batch to get a chunk of space for
     * the gen6 workaround because it involves actually writing to
     * the buffer, and the kernel doesn't let us write to the batch.
+    *
+    * As the screen has a long lifetime than the contexts derived from
+    * it, we do not need to add our own reference count and can simply
+    * rely on the bo always existing for the duration of the context.
     */
-   brw->workaround_bo = drm_intel_bo_alloc(brw->bufmgr,
-                                           "pipe_control workaround",
-                                           4096, 4096);
-   if (brw->workaround_bo == NULL)
-      return -ENOMEM;
+   brw->workaround_bo = brw->screen->workaround_bo;
 
    brw->pipe_controls_since_last_cs_stall = 0;
-
    return 0;
 }
 
 void
 brw_fini_pipe_control(struct brw_context *brw)
 {
-   drm_intel_bo_unreference(brw->workaround_bo);
 }
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 5f800008c1..6e788c41cc 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -107,6 +107,7 @@ DRI_CONF_END
 #include "brw_context.h"
 
 #include "i915_drm.h"
+#include "libdrm_compat.h"
 
 /**
  * For debugging purposes, this returns a time in seconds.
@@ -1030,6 +1031,7 @@ intelDestroyScreen(__DRIscreen * sPriv)
 {
    struct intel_screen *screen = sPriv->driverPrivate;
 
+   drm_intel_bo_unreference(screen->workaround_bo);
    dri_bufmgr_destroy(screen->bufmgr);
    driDestroyOptionInfo(&screen->optionCache);
 
@@ -1210,6 +1212,25 @@ intel_init_bufmgr(struct intel_screen *screen)
 }
 
 static bool
+intel_init_workaround_bo(struct intel_screen *screen)
+{
+   /* A small scratch bo shared by all contexts, primarily used
+    * for doing PIPECONTROL serialisation writes that are discarded.
+    */
+   screen->workaround_bo =
+      drm_intel_bo_alloc(screen->bufmgr, "pipe_control w/a", 4096, 4096);
+
+   /* We want to use this bo from any and all contexts, without undue
+    * writing ordering between them. To prevent the kernel enforcing
+    * the order due to writes from different contexts, we disable
+    * the use of (the kernel's) implicit sync on this bo.
+    */
+   drm_intel_gem_bo_disable_implicit_sync(screen->workaround_bo);
+
+   return screen->workaround_bo != NULL;
+}
+
+static bool
 intel_detect_swizzling(struct intel_screen *screen)
 {
    drm_intel_bo *buffer;
@@ -1675,6 +1696,9 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
    if (!intel_init_bufmgr(screen))
        return false;
 
+   if (!intel_init_workaround_bo(screen))
+       return false;
+
    screen->deviceID = drm_intel_bufmgr_gem_get_devid(screen->bufmgr);
    if (!gen_get_device_info(screen->deviceID, &screen->devinfo))
       return false;
diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h
index 890dd9044b..0fb83e724f 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.h
+++ b/src/mesa/drivers/dri/i965/intel_screen.h
@@ -74,6 +74,7 @@ struct intel_screen
 #define KERNEL_ALLOWS_COMPUTE_DISPATCH              (1<<4)
 
    dri_bufmgr *bufmgr;
+   drm_intel_bo *workaround_bo;
 
    /**
     * A unique ID for shader programs.
diff --git a/src/mesa/drivers/dri/i965/libdrm_compat.h b/src/mesa/drivers/dri/i965/libdrm_compat.h
new file mode 100644
index 0000000000..bef9a1286b
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/libdrm_compat.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef __LIBDRM_COMPAT_H
+#define __LIBDRM_COMPAT_H
+
+#include <intel_bufmgr.h>
+
+#ifndef HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC
+#define drm_intel_gem_bo_disable_implicit_sync(BO) do { } while (0)
+#endif
+
+#endif /* !__LIBDRM_COMPAT_H */
-- 
2.11.0

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  reply	other threads:[~2017-01-26 10:58 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-07 13:59 Trivial scheduler, take 2 Chris Wilson
2016-11-07 13:59 ` [PATCH v2 01/11] drm/i915: Create distinct lockclasses for execution vs user timelines Chris Wilson
2016-11-08  7:43   ` Joonas Lahtinen
2016-11-08  8:50     ` Chris Wilson
2016-11-07 13:59 ` [PATCH v2 02/11] drm/i915: Split request submit/execute phase into two Chris Wilson
2016-11-08  9:06   ` Joonas Lahtinen
2016-11-07 13:59 ` [PATCH v2 03/11] drm/i915: Defer transfer onto execution timeline to actual hw submission Chris Wilson
2016-11-10 10:43   ` Tvrtko Ursulin
2016-11-10 11:11     ` Chris Wilson
2016-11-10 11:51       ` Tvrtko Ursulin
2016-11-10 14:43         ` Chris Wilson
2016-11-10 11:23     ` [PATCH v3] " Chris Wilson
2016-11-07 13:59 ` [PATCH v2 04/11] drm/i915: Remove engine->execlist_lock Chris Wilson
2016-11-07 13:59 ` [PATCH v2 05/11] drm/i915/scheduler: Signal the arrival of a new request Chris Wilson
2016-11-07 13:59 ` [PATCH v2 06/11] drm/i915/scheduler: Record all dependencies upon request construction Chris Wilson
2016-11-08 12:20   ` Chris Wilson
2016-11-10 10:44     ` Tvrtko Ursulin
2016-11-10 10:55       ` Chris Wilson
2016-11-10 11:54         ` Tvrtko Ursulin
2016-11-10 12:10           ` Chris Wilson
2016-11-10 14:45   ` Tvrtko Ursulin
2016-11-10 15:01     ` Chris Wilson
2016-11-10 15:36       ` Tvrtko Ursulin
2016-11-10 15:55         ` Chris Wilson
2016-11-07 13:59 ` [PATCH v2 07/11] drm/i915/scheduler: Boost priorities for flips Chris Wilson
2016-11-10 10:52   ` Tvrtko Ursulin
2016-11-07 13:59 ` [PATCH v2 08/11] HACK drm/i915/scheduler: emulate a scheduler for guc Chris Wilson
2016-11-07 13:59 ` [PATCH v2 09/11] drm/i915/scheduler: Support user-defined priorities Chris Wilson
2016-11-10 13:02   ` Tvrtko Ursulin
2016-11-10 13:10     ` Chris Wilson
2016-11-07 13:59 ` [PATCH v2 10/11] drm/i915: Enable userspace to opt-out of implicit fencing Chris Wilson
2016-11-07 13:59 ` [PATCH v2 11/11] drm/i915: Support explicit fencing for execbuf Chris Wilson
2016-11-07 15:18 ` ✓ Fi.CI.BAT: success for series starting with [v2,01/11] drm/i915: Create distinct lockclasses for execution vs user timelines Patchwork
2016-11-10 11:45 ` ✓ Fi.CI.BAT: success for series starting with [v2,01/11] drm/i915: Create distinct lockclasses for execution vs user timelines (rev2) Patchwork
2016-11-10 12:04   ` Saarinen, Jani
2016-11-14  8:56 ` [PATCH v3 01/14] drm/i915: Give each sw_fence its own lockclass Chris Wilson
2016-11-14  8:56   ` [PATCH v3 02/14] drm/i915: Create distinct lockclasses for execution vs user timelines Chris Wilson
2016-11-14  8:56   ` [PATCH v3 03/14] drm/i915: Split request submit/execute phase into two Chris Wilson
2016-11-14  8:56   ` [PATCH v3 04/14] drm/i915: Defer transfer onto execution timeline to actual hw submission Chris Wilson
2016-11-14 10:59     ` Tvrtko Ursulin
2016-11-14  8:56   ` [PATCH v3 05/14] drm/i915: Remove engine->execlist_lock Chris Wilson
2016-11-14  8:56   ` [PATCH v3 06/14] drm/i915/scheduler: Signal the arrival of a new request Chris Wilson
2016-11-14  8:56   ` [PATCH v3 07/14] drm/i915/scheduler: Record all dependencies upon request construction Chris Wilson
2016-11-14 11:09     ` Tvrtko Ursulin
2016-11-14  8:56   ` [PATCH v3 08/14] drm/i915/scheduler: Execute requests in order of priorities Chris Wilson
2016-11-14 11:15     ` Tvrtko Ursulin
2016-11-14 11:41       ` Chris Wilson
2016-11-14 11:48         ` Tvrtko Ursulin
2016-11-14 14:25           ` Chris Wilson
2016-11-14  8:56   ` [PATCH v3 09/14] drm/i915: Store the execution priority on the context Chris Wilson
2016-11-14 11:16     ` Tvrtko Ursulin
2016-11-14  8:56   ` [PATCH v3 10/14] drm/i915/scheduler: Boost priorities for flips Chris Wilson
2016-11-14  8:57   ` [PATCH v3 11/14] HACK drm/i915/scheduler: emulate a scheduler for guc Chris Wilson
2016-11-14 11:31     ` Tvrtko Ursulin
2016-11-14 14:40       ` Chris Wilson
2016-12-01 10:45     ` Tvrtko Ursulin
2016-12-01 11:18       ` Chris Wilson
2016-12-01 12:45         ` Tvrtko Ursulin
2016-12-01 13:01           ` Chris Wilson
2016-11-14  8:57   ` [PATCH v3 12/14] drm/i915/scheduler: Support user-defined priorities Chris Wilson
2016-11-14 11:32     ` Tvrtko Ursulin
2016-11-14  8:57   ` [PATCH v3 13/14] drm/i915: Enable userspace to opt-out of implicit fencing Chris Wilson
2017-01-25 20:38     ` Chad Versace
2017-01-26 10:32       ` Chris Wilson
2017-01-26 10:58         ` Chris Wilson [this message]
2017-01-26 17:39           ` [Mesa-dev] [PATCH] i965: Share the workaround bo between all contexts Chad Versace
2017-01-26 18:05             ` Chris Wilson
2017-01-26 23:40               ` Chad Versace
2017-01-26 18:46             ` Chris Wilson
2017-01-27  0:01             ` Chad Versace
2017-01-27 18:20               ` [Intel-gfx] " Emil Velikov
2017-01-27 18:30                 ` [Mesa-dev] " Chris Wilson
2017-01-27 18:37                   ` [Intel-gfx] " Emil Velikov
2017-01-27  0:07         ` [PATCH v3 13/14] drm/i915: Enable userspace to opt-out of implicit fencing Chad Versace
2016-11-14  8:57   ` [PATCH v3 14/14] drm/i915: Support explicit fencing for execbuf Chris Wilson
2016-11-14 22:29     ` Rafael Antognolli
2017-01-25 20:27     ` Chad Versace
2016-11-14  9:01   ` [PATCH v3 01/14] drm/i915: Give each sw_fence its own lockclass Tvrtko Ursulin
2016-11-14  9:05     ` Chris Wilson
2016-11-14 10:57   ` Tvrtko Ursulin
2016-11-14 14:48   ` Joonas Lahtinen
2016-11-14 15:13     ` Chris Wilson

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