From: Robert Bragg <robert@sixbynine.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/6] drm/i915: expose _SUBSLICE_MASK GETPARM
Date: Wed, 22 Feb 2017 16:36:30 +0000 [thread overview]
Message-ID: <20170222163634.7079-3-robert@sixbynine.org> (raw)
In-Reply-To: <20170222163634.7079-1-robert@sixbynine.org>
Assuming a uniform mask across all slices, this enables userspace to
determine the specific sub slices enabled. This information is required,
for example, to be able to analyse some OA counter reports where the
counter configuration depends on the HW sub slice configuration.
Signed-off-by: Robert Bragg <robert@sixbynine.org>
---
drivers/gpu/drm/i915/i915_drv.c | 5 +++++
include/uapi/drm/i915_drm.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d391768f301b..a497537b42d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -364,6 +364,11 @@ static int i915_getparam(struct drm_device *dev, void *data,
if (!value)
return -ENODEV;
break;
+ case I915_PARAM_SUBSLICE_MASK:
+ value = INTEL_INFO(dev_priv)->sseu.subslice_mask;
+ if (!value)
+ return -ENODEV;
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index f47fb7f26f36..e0599e729e68 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -393,6 +393,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_MIN_EU_IN_POOL 39
#define I915_PARAM_MMAP_GTT_VERSION 40
#define I915_PARAM_SLICE_MASK 45 /* XXX: rebase before landing */
+#define I915_PARAM_SUBSLICE_MASK 46
/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
* priorities and the driver will attempt to execute batches in priority order.
--
2.11.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-02-22 16:37 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-22 16:36 [PATCH 0/6] Enable OA unit for Gen 8 and 9 in i915 perf Robert Bragg
2017-02-22 16:36 ` [PATCH 1/6] drm/i915: expose _SLICE_MASK GETPARM Robert Bragg
2017-02-22 16:36 ` Robert Bragg [this message]
2017-02-22 16:36 ` [PATCH 3/6] drm/i915: Add uncore mmio api for per-context registers Robert Bragg
2017-02-23 15:35 ` Chris Wilson
2017-03-23 16:43 ` Robert Bragg
2017-02-22 16:36 ` [PATCH 4/6] drm/i915: Add 'render basic' Gen8+ OA unit configs Robert Bragg
2017-02-22 16:36 ` [PATCH 5/6] drm/i915: Add OA unit support for Gen 8+ Robert Bragg
2017-02-22 16:36 ` [PATCH 6/6] drm/i915: Add more OA configs for BDW, CHV, SKL + BXT Robert Bragg
2017-03-01 13:00 ` Matthew Auld
2017-03-20 16:34 ` Robert Bragg
2017-02-22 19:22 ` ✓ Fi.CI.BAT: success for Enable OA unit for Gen 8 and 9 in i915 perf Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170222163634.7079-3-robert@sixbynine.org \
--to=robert@sixbynine.org \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.