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From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
To: dri-devel@lists.freedesktop.org
Cc: Archit Taneja <architt@codeaurora.org>,
	Fabio Estevam <fabio.estevam@freescale.com>,
	Jose Abreu <Jose.Abreu@synopsys.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kieran Bingham <kieran.bingham@ideasonboard.com>,
	linux-renesas-soc@vger.kernel.org,
	Nickey Yang <nickey.yang@rock-chips.com>,
	Russell King <rmk+kernel@arm.linux.org.uk>,
	Andy Yan <andy.yan@rock-chips.com>,
	Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Subject: [PATCH v5.1 05/10] drm: bridge: dw-hdmi: Fix the PHY power up sequence
Date: Mon,  6 Mar 2017 01:35:57 +0200	[thread overview]
Message-ID: <20170305233557.11945-1-laurent.pinchart+renesas@ideasonboard.com> (raw)
In-Reply-To: <20170303172007.26541-6-laurent.pinchart+renesas@ideasonboard.com>

When powering the PHY up we need to wait for the PLL to lock. This is
done by polling the TX_PHY_LOCK bit in the HDMI_PHY_STAT0 register
(interrupt-based wait could be implemented as well but is likely
overkill). The bit is asserted when the PLL locks, but the current code
incorrectly waits for the bit to be deasserted. Fix it, and while at it,
replace the udelay() with a sleep as the code never runs in
non-sleepable context.

To be consistent with the power down implementation move the poll loop
to the power off function.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
---
 drivers/gpu/drm/bridge/dw-hdmi.c | 65 +++++++++++++++++++++++-----------------
 1 file changed, 37 insertions(+), 28 deletions(-)

Changes since v5:

- Fix compilation breakage due to reordering of the patches compared to v4

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index 3a1cd4c7ac64..c25eac8ba47b 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -949,9 +949,44 @@ static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
 	dw_hdmi_phy_gen2_pddq(hdmi, 1);
 }
 
+static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy;
+	unsigned int i;
+	u8 val;
+
+	if (phy->gen == 1) {
+		dw_hdmi_phy_enable_powerdown(hdmi, false);
+
+		/* Toggle TMDS enable. */
+		dw_hdmi_phy_enable_tmds(hdmi, 0);
+		dw_hdmi_phy_enable_tmds(hdmi, 1);
+		return 0;
+	}
+
+	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
+	dw_hdmi_phy_gen2_pddq(hdmi, 0);
+
+	/* Wait for PHY PLL lock */
+	for (i = 0; i < 5; ++i) {
+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
+		if (val)
+			break;
+
+		usleep_range(1000, 2000);
+	}
+
+	if (!val) {
+		dev_err(hdmi->dev, "PHY PLL failed to lock\n");
+		return -ETIMEDOUT;
+	}
+
+	dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
+	return 0;
+}
+
 static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 {
-	u8 val, msec;
 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
@@ -1019,33 +1054,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
 			   HDMI_3D_TX_PHY_CKCALCTRL);
 
-	dw_hdmi_phy_enable_powerdown(hdmi, false);
-
-	/* toggle TMDS enable */
-	dw_hdmi_phy_enable_tmds(hdmi, 0);
-	dw_hdmi_phy_enable_tmds(hdmi, 1);
-
-	/* gen2 tx power on */
-	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
-	dw_hdmi_phy_gen2_pddq(hdmi, 0);
-
-	/* Wait for PHY PLL lock */
-	msec = 5;
-	do {
-		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
-		if (!val)
-			break;
-
-		if (msec == 0) {
-			dev_err(hdmi->dev, "PHY PLL not locked\n");
-			return -ETIMEDOUT;
-		}
-
-		udelay(1000);
-		msec--;
-	} while (1);
-
-	return 0;
+	return dw_hdmi_phy_power_on(hdmi);
 }
 
 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
-- 
Regards,

Laurent Pinchart

WARNING: multiple messages have this Message-ID (diff)
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
To: dri-devel@lists.freedesktop.org
Cc: Fabio Estevam <fabio.estevam@freescale.com>,
	Jose Abreu <Jose.Abreu@synopsys.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kieran Bingham <kieran.bingham@ideasonboard.com>,
	linux-renesas-soc@vger.kernel.org,
	Nickey Yang <nickey.yang@rock-chips.com>,
	Andy Yan <andy.yan@rock-chips.com>,
	Russell King <rmk+kernel@arm.linux.org.uk>,
	Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Subject: [PATCH v5.1 05/10] drm: bridge: dw-hdmi: Fix the PHY power up sequence
Date: Mon,  6 Mar 2017 01:35:57 +0200	[thread overview]
Message-ID: <20170305233557.11945-1-laurent.pinchart+renesas@ideasonboard.com> (raw)
In-Reply-To: <20170303172007.26541-6-laurent.pinchart+renesas@ideasonboard.com>

When powering the PHY up we need to wait for the PLL to lock. This is
done by polling the TX_PHY_LOCK bit in the HDMI_PHY_STAT0 register
(interrupt-based wait could be implemented as well but is likely
overkill). The bit is asserted when the PLL locks, but the current code
incorrectly waits for the bit to be deasserted. Fix it, and while at it,
replace the udelay() with a sleep as the code never runs in
non-sleepable context.

To be consistent with the power down implementation move the poll loop
to the power off function.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
---
 drivers/gpu/drm/bridge/dw-hdmi.c | 65 +++++++++++++++++++++++-----------------
 1 file changed, 37 insertions(+), 28 deletions(-)

Changes since v5:

- Fix compilation breakage due to reordering of the patches compared to v4

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index 3a1cd4c7ac64..c25eac8ba47b 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -949,9 +949,44 @@ static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
 	dw_hdmi_phy_gen2_pddq(hdmi, 1);
 }
 
+static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy;
+	unsigned int i;
+	u8 val;
+
+	if (phy->gen == 1) {
+		dw_hdmi_phy_enable_powerdown(hdmi, false);
+
+		/* Toggle TMDS enable. */
+		dw_hdmi_phy_enable_tmds(hdmi, 0);
+		dw_hdmi_phy_enable_tmds(hdmi, 1);
+		return 0;
+	}
+
+	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
+	dw_hdmi_phy_gen2_pddq(hdmi, 0);
+
+	/* Wait for PHY PLL lock */
+	for (i = 0; i < 5; ++i) {
+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
+		if (val)
+			break;
+
+		usleep_range(1000, 2000);
+	}
+
+	if (!val) {
+		dev_err(hdmi->dev, "PHY PLL failed to lock\n");
+		return -ETIMEDOUT;
+	}
+
+	dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
+	return 0;
+}
+
 static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 {
-	u8 val, msec;
 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
@@ -1019,33 +1054,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
 			   HDMI_3D_TX_PHY_CKCALCTRL);
 
-	dw_hdmi_phy_enable_powerdown(hdmi, false);
-
-	/* toggle TMDS enable */
-	dw_hdmi_phy_enable_tmds(hdmi, 0);
-	dw_hdmi_phy_enable_tmds(hdmi, 1);
-
-	/* gen2 tx power on */
-	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
-	dw_hdmi_phy_gen2_pddq(hdmi, 0);
-
-	/* Wait for PHY PLL lock */
-	msec = 5;
-	do {
-		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
-		if (!val)
-			break;
-
-		if (msec == 0) {
-			dev_err(hdmi->dev, "PHY PLL not locked\n");
-			return -ETIMEDOUT;
-		}
-
-		udelay(1000);
-		msec--;
-	} while (1);
-
-	return 0;
+	return dw_hdmi_phy_power_on(hdmi);
 }
 
 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
-- 
Regards,

Laurent Pinchart

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dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2017-03-05 23:44 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-03 17:19 [PATCH v5 00/10] drm: bridge: dw-hdmi: Refactor PHY support Laurent Pinchart
2017-03-03 17:19 ` Laurent Pinchart
2017-03-03 17:19 ` [PATCH v5 01/10] drm: bridge: dw-hdmi: Remove unused functions Laurent Pinchart
2017-03-03 17:19   ` Laurent Pinchart
2017-03-04  1:11   ` [PATCH v5.1 10/10] drm: bridge: dw-hdmi: Move the driver to a separate directory Laurent Pinchart
2017-03-04  1:11     ` Laurent Pinchart
2017-03-03 17:19 ` [PATCH v5 02/10] drm: bridge: dw-hdmi: Move CSC configuration out of PHY code Laurent Pinchart
2017-03-03 17:19   ` Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 03/10] drm: bridge: dw-hdmi: Enable CSC even for DVI Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 04/10] drm: bridge: dw-hdmi: Fix the PHY power down sequence Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-05 23:35   ` [PATCH v5.1 " Laurent Pinchart
2017-03-05 23:35     ` Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 05/10] drm: bridge: dw-hdmi: Fix the PHY power up sequence Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-05 23:35   ` Laurent Pinchart [this message]
2017-03-05 23:35     ` [PATCH v5.1 " Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 06/10] drm: bridge: dw-hdmi: Create PHY operations Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-05 23:36   ` [PATCH v5.1 " Laurent Pinchart
2017-03-05 23:36     ` Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 07/10] drm: bridge: dw-hdmi: Add support for custom PHY configuration Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-04-24  7:46   ` 郑阳
2017-04-26 11:04     ` Jose Abreu
2017-04-27  4:16       ` 郑阳
2017-03-03 17:20 ` [PATCH v5 08/10] drm: bridge: dw-hdmi: Remove device type from platform data Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 09/10] drm: bridge: dw-hdmi: Switch to regmap for register access Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-03 17:20 ` [PATCH v5 10/10] drm: bridge: dw-hdmi: Move the driver to a separate directory Laurent Pinchart
2017-03-03 17:20   ` Laurent Pinchart
2017-03-10 11:10 ` [PATCH v5 00/10] drm: bridge: dw-hdmi: Refactor PHY support Archit Taneja
2017-03-10 11:10   ` Archit Taneja

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