From: Sean Paul <seanpaul@chromium.org> To: linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org Cc: David Airlie <airlied@linux.ie>, Sean Paul <seanpaul@chromium.org>, Heiko Stuebner <heiko@sntech.de>, linux-arm-kernel@lists.infradead.org, Mark Yao <mark.yao@rock-chips.com> Subject: [PATCH 13/41] drm/rockchip: pre dither down when output bpc is 8bit Date: Thu, 9 Mar 2017 23:32:28 -0500 [thread overview] Message-ID: <20170310043305.17216-14-seanpaul@chromium.org> (raw) In-Reply-To: <20170310043305.17216-1-seanpaul@chromium.org> From: Mark Yao <mark.yao@rock-chips.com> Some encoder have a crc verification check, crc check fail if input and output data is not equal. That means encoder input and output need use same color depth, vop can output 10bit data to encoder, but some panel only support 8bit depth, that would make crc check die. So pre dither down vop data to 8bit if panel's bpc is 8. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 4 ++++ drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 6 ++++-- 5 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index f44756029478..b6c6d6d09d7e 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -225,6 +225,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, { struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); struct rockchip_dp_device *dp = to_dp(encoder); + struct drm_display_info *di = &conn_state->connector->display_info; int ret; /* @@ -248,6 +249,9 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, s->output_mode = ROCKCHIP_OUT_MODE_P888; } + s->output_bpc = di->bpc; + s->output_type = DRM_MODE_CONNECTOR_eDP; + return 0; } diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 1844951118da..a966d1d37378 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -36,6 +36,7 @@ struct rockchip_crtc_state { struct drm_crtc_state base; int output_type; int output_mode; + int output_bpc; }; #define to_rockchip_crtc_state(s) \ container_of(s, struct rockchip_crtc_state, base) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index aa5c528c59fc..ea3fff4170d9 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -968,6 +968,10 @@ static void vop_crtc_enable(struct drm_crtc *crtc) DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", s->output_type); } + if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8) + VOP_CTRL_SET(vop, pre_dither_down, 1); + else + VOP_CTRL_SET(vop, pre_dither_down, 0); VOP_CTRL_SET(vop, out_mode, s->output_mode); VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 5a4faa85dbd2..9a1eb83271eb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -47,6 +47,7 @@ struct vop_ctrl { struct vop_reg mipi_en; struct vop_reg dp_en; struct vop_reg out_mode; + struct vop_reg pre_dither_down; struct vop_reg dither_down; struct vop_reg dither_up; struct vop_reg pin_pol; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 91fbc7b52147..e645a9621721 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -212,7 +212,8 @@ static const struct vop_ctrl rk3288_ctrl_data = { .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1), + .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1), + .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x7, 2), .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0), @@ -289,7 +290,8 @@ static const struct vop_ctrl rk3399_ctrl_data = { .hdmi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 13), .edp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 14), .mipi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(RK3399_DSP_CTRL1, 0xf, 1), + .pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1), + .dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x7, 2), .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6), .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19), .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0), -- 2.12.0.246.ga2ecc84866-goog
WARNING: multiple messages have this Message-ID (diff)
From: seanpaul@chromium.org (Sean Paul) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 13/41] drm/rockchip: pre dither down when output bpc is 8bit Date: Thu, 9 Mar 2017 23:32:28 -0500 [thread overview] Message-ID: <20170310043305.17216-14-seanpaul@chromium.org> (raw) In-Reply-To: <20170310043305.17216-1-seanpaul@chromium.org> From: Mark Yao <mark.yao@rock-chips.com> Some encoder have a crc verification check, crc check fail if input and output data is not equal. That means encoder input and output need use same color depth, vop can output 10bit data to encoder, but some panel only support 8bit depth, that would make crc check die. So pre dither down vop data to 8bit if panel's bpc is 8. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 4 ++++ drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 6 ++++-- 5 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index f44756029478..b6c6d6d09d7e 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -225,6 +225,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, { struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); struct rockchip_dp_device *dp = to_dp(encoder); + struct drm_display_info *di = &conn_state->connector->display_info; int ret; /* @@ -248,6 +249,9 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, s->output_mode = ROCKCHIP_OUT_MODE_P888; } + s->output_bpc = di->bpc; + s->output_type = DRM_MODE_CONNECTOR_eDP; + return 0; } diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 1844951118da..a966d1d37378 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -36,6 +36,7 @@ struct rockchip_crtc_state { struct drm_crtc_state base; int output_type; int output_mode; + int output_bpc; }; #define to_rockchip_crtc_state(s) \ container_of(s, struct rockchip_crtc_state, base) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index aa5c528c59fc..ea3fff4170d9 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -968,6 +968,10 @@ static void vop_crtc_enable(struct drm_crtc *crtc) DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", s->output_type); } + if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8) + VOP_CTRL_SET(vop, pre_dither_down, 1); + else + VOP_CTRL_SET(vop, pre_dither_down, 0); VOP_CTRL_SET(vop, out_mode, s->output_mode); VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 5a4faa85dbd2..9a1eb83271eb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -47,6 +47,7 @@ struct vop_ctrl { struct vop_reg mipi_en; struct vop_reg dp_en; struct vop_reg out_mode; + struct vop_reg pre_dither_down; struct vop_reg dither_down; struct vop_reg dither_up; struct vop_reg pin_pol; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 91fbc7b52147..e645a9621721 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -212,7 +212,8 @@ static const struct vop_ctrl rk3288_ctrl_data = { .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1), + .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1), + .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x7, 2), .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0), @@ -289,7 +290,8 @@ static const struct vop_ctrl rk3399_ctrl_data = { .hdmi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 13), .edp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 14), .mipi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(RK3399_DSP_CTRL1, 0xf, 1), + .pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1), + .dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x7, 2), .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6), .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19), .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0), -- 2.12.0.246.ga2ecc84866-goog
next prev parent reply other threads:[~2017-03-10 4:32 UTC|newest] Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-10 4:32 [PATCH 00/41] Chromebook Plus (aka kevin) kernel patches Sean Paul 2017-03-10 4:32 ` [PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31 Sean Paul 2017-03-20 13:59 ` Thierry Reding 2017-03-20 16:37 ` Doug Anderson 2017-03-20 20:01 ` Stéphane Marchesin 2017-03-20 20:05 ` Doug Anderson 2017-03-10 4:32 ` [PATCH 03/41] drm/rockchip: support prime import sg table Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-12-12 12:32 ` Heiko Stuebner 2017-12-12 12:32 ` Heiko Stuebner 2017-03-10 4:32 ` [PATCH 04/41] drm/rockchip: Respect page offset for PRIME mmap calls Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-12-12 16:58 ` Heiko Stuebner 2017-12-12 16:58 ` Heiko Stuebner 2017-03-10 4:32 ` [PATCH 05/41] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge Sean Paul 2017-03-10 4:32 ` Sean Paul [not found] ` <20170310043305.17216-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2017-03-10 4:32 ` [PATCH 02/41] drm/rockchip: Get rid of some unnecessary code Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-12-12 12:25 ` Heiko Stuebner 2017-12-12 12:25 ` Heiko Stuebner 2017-03-10 4:32 ` [PATCH 06/41] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind Sean Paul 2017-03-16 12:31 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 08/41] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR Sean Paul 2017-03-16 13:28 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 12/41] drm/bridge: analogix_dp: add fast link train for eDP Sean Paul 2017-03-16 14:14 ` Andrzej Hajda 2017-03-21 20:37 ` Sean Paul 2017-03-22 8:07 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 15/41] drm/bridge: analogix_dp: Move enable video into config_video() Sean Paul 2017-03-16 14:26 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 16/41] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Sean Paul 2017-03-16 14:28 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 17/41] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Sean Paul 2017-03-16 14:34 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 18/41] drm/bridge: analogix_dp: Retry bridge enable when it failed Sean Paul 2017-03-16 14:45 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 19/41] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Sean Paul 2017-03-16 14:51 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 21/41] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Sean Paul 2017-03-22 8:29 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 22/41] drm/bridge: analogix_dp: Extend hpd check time to 100ms Sean Paul 2017-03-22 8:32 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 23/41] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Sean Paul 2017-03-22 8:46 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 24/41] drm/bridge: analogix_dp: Check dpcd write/read status Sean Paul 2017-03-22 9:00 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 25/41] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Sean Paul 2017-03-22 9:09 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 26/41] drm/bridge: analogix_dp: Reset aux channel if an error occurred Sean Paul 2017-03-22 9:14 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 35/41] drm/rockchip: analogix_dp: Fix invalid implementation of unbind Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 36/41] drm/bridge: analogix_dp: Add analogix_dp_shutdown Sean Paul 2017-03-10 4:32 ` [PATCH 37/41] drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 38/41] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Sean Paul 2017-03-22 10:34 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 41/41] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Sean Paul 2017-03-22 10:57 ` Andrzej Hajda 2017-03-22 15:59 ` Doug Anderson 2017-03-28 15:40 ` Javier Martinez Canillas 2017-03-10 4:32 ` [PATCH 07/41] drm/rockchip: Don't use atomic constructs for psr Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 09/41] drm/rockchip: Remove analogix psr worker Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-16 13:40 ` Andrzej Hajda 2017-03-16 13:40 ` Andrzej Hajda 2017-03-21 19:58 ` Sean Paul 2017-03-21 19:58 ` Sean Paul 2017-03-22 8:36 ` Andrzej Hajda 2017-03-22 8:36 ` Andrzej Hajda 2017-03-22 15:19 ` Sean Paul 2017-03-22 15:19 ` Sean Paul 2017-03-23 9:04 ` Andrzej Hajda 2017-03-23 9:04 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 11/41] drm/rockchip: add mutex vop lock Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` Sean Paul [this message] 2017-03-10 4:32 ` [PATCH 13/41] drm/rockchip: pre dither down when output bpc is 8bit Sean Paul 2017-03-10 4:32 ` [PATCH 14/41] drm/rockchip: Only wait for panel ACK on PSR entry Sean Paul 2017-03-10 4:32 ` [PATCH 20/41] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Sean Paul 2017-03-16 14:54 ` Andrzej Hajda 2017-03-16 14:54 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 27/41] drm/rockchip: Restore psr->state when enable/disable psr failed Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 28/41] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Sean Paul 2017-03-22 9:17 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 29/41] drm/bridge: analogix_dp: Fix timeout of video streamclk config Sean Paul 2017-03-22 9:24 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 30/41] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Sean Paul 2017-03-22 9:29 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 31/41] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Sean Paul 2017-03-22 10:25 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 32/41] drm/rockchip: Flush PSR before committing modeset disables/enables Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 33/41] drm/rockchip: Disable VOP windows when PSR is active Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 34/41] drm/bridge: analogix_dp: Allow master driver to cleanup in unbind Sean Paul 2017-03-10 7:09 ` Tomasz Figa 2017-03-10 14:24 ` Sean Paul 2017-03-10 4:32 ` [PATCH 39/41] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-22 10:42 ` Andrzej Hajda 2017-03-22 10:42 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 40/41] drm/bridge: analogix_dp: Properly log AUX CH errors Sean Paul 2017-03-22 10:47 ` Andrzej Hajda 2017-03-14 20:43 ` [PATCH 00/41] Chromebook Plus (aka kevin) kernel patches Sean Paul 2017-03-16 16:45 ` Enric Balletbo Serra
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