From: Sean Paul <seanpaul@chromium.org> To: linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org Cc: zain wang <wzz@rock-chips.com>, Douglas Anderson <dianders@chromium.org>, Tomasz Figa <tfiga@chromium.org>, "Kristian H . Kristensen" <hoegsberg@chromium.org>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 33/41] drm/rockchip: Disable VOP windows when PSR is active Date: Thu, 9 Mar 2017 23:32:48 -0500 [thread overview] Message-ID: <20170310043305.17216-34-seanpaul@chromium.org> (raw) In-Reply-To: <20170310043305.17216-1-seanpaul@chromium.org> From: zain wang <wzz@rock-chips.com> We do not have to drive the display when it is in PSR mode, so we can save some power by disabling active VOP windows, until a next PSR flush turns them back on. Cc: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: zain wang <wzz@rock-chips.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 34 +++++++++++++++++-------- drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 31 ++++++++++++++++++++++ 3 files changed, 55 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 0614d32c5435..de23cc6fd05d 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -91,19 +91,31 @@ static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled) if (!crtc) return -EINVAL; - vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay; + if (enabled) { + vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + + crtc->mode.vdisplay; + ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end, + PSR_WAIT_LINE_FLAG_TIMEOUT_MS); + if (ret) { + dev_err(dp->dev, "line flag interrupt did not arrive\n"); + return -ETIMEDOUT; + } - ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end, - PSR_WAIT_LINE_FLAG_TIMEOUT_MS); - if (ret) { - dev_err(dp->dev, "line flag interrupt did not arrive\n"); - return -ETIMEDOUT; + ret = analogix_dp_enable_psr(dp->dev); + if (ret) { + dev_err(dp->dev, "failed to enable psr %d\n", ret); + return ret; + } + rockchip_drm_set_win_enabled(crtc, false); + } else { + rockchip_drm_set_win_enabled(crtc, true); + ret = analogix_dp_disable_psr(dp->dev); + if (ret) { + dev_err(dp->dev, "failed to disable psr %d\n", ret); + return ret; + } } - - if (enabled) - return analogix_dp_enable_psr(dp->dev); - else - return analogix_dp_disable_psr(dp->dev); + return 0; } static int rockchip_dp_pre_init(struct rockchip_dp_device *dp) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index a966d1d37378..be4ad9b670cf 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -65,5 +65,6 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, struct device *dev); int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num, unsigned int mstimeout); +void rockchip_drm_set_win_enabled(struct drm_crtc *ctrc, bool enabled); #endif /* _ROCKCHIP_DRM_DRV_H_ */ diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 879efc3a6c67..e90a32ee5a36 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -89,6 +89,9 @@ #define VOP_WIN_GET_YRGBADDR(vop, win) \ vop_readl(vop, win->base + win->phy->yrgb_mst.offset) +#define VOP_WIN_TO_INDEX(vop_win) \ + ((vop_win) - (vop_win)->vop->win) + #define to_vop(x) container_of(x, struct vop, crtc) #define to_vop_win(x) container_of(x, struct vop_win, base) @@ -108,6 +111,8 @@ struct vop { struct drm_device *drm_dev; bool is_enabled; + unsigned int win_enabled; + struct completion dsp_hold_completion; /* protected by dev->event_lock */ @@ -562,6 +567,27 @@ static int vop_enable(struct drm_crtc *crtc) return ret; } +void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled) +{ + struct vop *vop = to_vop(crtc); + int i; + + spin_lock(&vop->reg_lock); + + for (i = 0; i < vop->data->win_size; i++) { + struct vop_win *vop_win = &vop->win[i]; + const struct vop_win_data *win = vop_win->data; + + VOP_WIN_SET(vop, win, enable, + enabled && (vop->win_enabled & BIT(i))); + } + + vop_cfg_done(vop); + + spin_unlock(&vop->reg_lock); +} +EXPORT_SYMBOL(rockchip_drm_set_win_enabled); + static void vop_crtc_disable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); @@ -581,6 +607,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc) spin_lock(&vop->reg_lock); VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(i); spin_unlock(&vop->reg_lock); } @@ -700,6 +727,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane, spin_lock(&vop->reg_lock); VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win)); spin_unlock(&vop->reg_lock); } @@ -807,6 +835,8 @@ static void vop_plane_atomic_update(struct drm_plane *plane, } VOP_WIN_SET(vop, win, enable, 1); + vop->win_enabled |= BIT(VOP_WIN_TO_INDEX(vop_win)); + spin_unlock(&vop->reg_lock); } @@ -1443,6 +1473,7 @@ static int vop_initial(struct vop *vop) const struct vop_win_data *win = &vop_data->win[i]; VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(i); } vop_cfg_done(vop); -- 2.12.0.246.ga2ecc84866-goog _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: seanpaul@chromium.org (Sean Paul) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 33/41] drm/rockchip: Disable VOP windows when PSR is active Date: Thu, 9 Mar 2017 23:32:48 -0500 [thread overview] Message-ID: <20170310043305.17216-34-seanpaul@chromium.org> (raw) In-Reply-To: <20170310043305.17216-1-seanpaul@chromium.org> From: zain wang <wzz@rock-chips.com> We do not have to drive the display when it is in PSR mode, so we can save some power by disabling active VOP windows, until a next PSR flush turns them back on. Cc: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: zain wang <wzz@rock-chips.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 34 +++++++++++++++++-------- drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 31 ++++++++++++++++++++++ 3 files changed, 55 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 0614d32c5435..de23cc6fd05d 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -91,19 +91,31 @@ static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled) if (!crtc) return -EINVAL; - vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay; + if (enabled) { + vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + + crtc->mode.vdisplay; + ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end, + PSR_WAIT_LINE_FLAG_TIMEOUT_MS); + if (ret) { + dev_err(dp->dev, "line flag interrupt did not arrive\n"); + return -ETIMEDOUT; + } - ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end, - PSR_WAIT_LINE_FLAG_TIMEOUT_MS); - if (ret) { - dev_err(dp->dev, "line flag interrupt did not arrive\n"); - return -ETIMEDOUT; + ret = analogix_dp_enable_psr(dp->dev); + if (ret) { + dev_err(dp->dev, "failed to enable psr %d\n", ret); + return ret; + } + rockchip_drm_set_win_enabled(crtc, false); + } else { + rockchip_drm_set_win_enabled(crtc, true); + ret = analogix_dp_disable_psr(dp->dev); + if (ret) { + dev_err(dp->dev, "failed to disable psr %d\n", ret); + return ret; + } } - - if (enabled) - return analogix_dp_enable_psr(dp->dev); - else - return analogix_dp_disable_psr(dp->dev); + return 0; } static int rockchip_dp_pre_init(struct rockchip_dp_device *dp) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index a966d1d37378..be4ad9b670cf 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -65,5 +65,6 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, struct device *dev); int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num, unsigned int mstimeout); +void rockchip_drm_set_win_enabled(struct drm_crtc *ctrc, bool enabled); #endif /* _ROCKCHIP_DRM_DRV_H_ */ diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 879efc3a6c67..e90a32ee5a36 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -89,6 +89,9 @@ #define VOP_WIN_GET_YRGBADDR(vop, win) \ vop_readl(vop, win->base + win->phy->yrgb_mst.offset) +#define VOP_WIN_TO_INDEX(vop_win) \ + ((vop_win) - (vop_win)->vop->win) + #define to_vop(x) container_of(x, struct vop, crtc) #define to_vop_win(x) container_of(x, struct vop_win, base) @@ -108,6 +111,8 @@ struct vop { struct drm_device *drm_dev; bool is_enabled; + unsigned int win_enabled; + struct completion dsp_hold_completion; /* protected by dev->event_lock */ @@ -562,6 +567,27 @@ static int vop_enable(struct drm_crtc *crtc) return ret; } +void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled) +{ + struct vop *vop = to_vop(crtc); + int i; + + spin_lock(&vop->reg_lock); + + for (i = 0; i < vop->data->win_size; i++) { + struct vop_win *vop_win = &vop->win[i]; + const struct vop_win_data *win = vop_win->data; + + VOP_WIN_SET(vop, win, enable, + enabled && (vop->win_enabled & BIT(i))); + } + + vop_cfg_done(vop); + + spin_unlock(&vop->reg_lock); +} +EXPORT_SYMBOL(rockchip_drm_set_win_enabled); + static void vop_crtc_disable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); @@ -581,6 +607,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc) spin_lock(&vop->reg_lock); VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(i); spin_unlock(&vop->reg_lock); } @@ -700,6 +727,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane, spin_lock(&vop->reg_lock); VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win)); spin_unlock(&vop->reg_lock); } @@ -807,6 +835,8 @@ static void vop_plane_atomic_update(struct drm_plane *plane, } VOP_WIN_SET(vop, win, enable, 1); + vop->win_enabled |= BIT(VOP_WIN_TO_INDEX(vop_win)); + spin_unlock(&vop->reg_lock); } @@ -1443,6 +1473,7 @@ static int vop_initial(struct vop *vop) const struct vop_win_data *win = &vop_data->win[i]; VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(i); } vop_cfg_done(vop); -- 2.12.0.246.ga2ecc84866-goog
next prev parent reply other threads:[~2017-03-10 4:32 UTC|newest] Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-10 4:32 [PATCH 00/41] Chromebook Plus (aka kevin) kernel patches Sean Paul 2017-03-10 4:32 ` [PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31 Sean Paul 2017-03-20 13:59 ` Thierry Reding 2017-03-20 16:37 ` Doug Anderson 2017-03-20 20:01 ` Stéphane Marchesin 2017-03-20 20:05 ` Doug Anderson 2017-03-10 4:32 ` [PATCH 03/41] drm/rockchip: support prime import sg table Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-12-12 12:32 ` Heiko Stuebner 2017-12-12 12:32 ` Heiko Stuebner 2017-03-10 4:32 ` [PATCH 04/41] drm/rockchip: Respect page offset for PRIME mmap calls Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-12-12 16:58 ` Heiko Stuebner 2017-12-12 16:58 ` Heiko Stuebner 2017-03-10 4:32 ` [PATCH 05/41] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge Sean Paul 2017-03-10 4:32 ` Sean Paul [not found] ` <20170310043305.17216-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2017-03-10 4:32 ` [PATCH 02/41] drm/rockchip: Get rid of some unnecessary code Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-12-12 12:25 ` Heiko Stuebner 2017-12-12 12:25 ` Heiko Stuebner 2017-03-10 4:32 ` [PATCH 06/41] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind Sean Paul 2017-03-16 12:31 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 08/41] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR Sean Paul 2017-03-16 13:28 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 12/41] drm/bridge: analogix_dp: add fast link train for eDP Sean Paul 2017-03-16 14:14 ` Andrzej Hajda 2017-03-21 20:37 ` Sean Paul 2017-03-22 8:07 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 15/41] drm/bridge: analogix_dp: Move enable video into config_video() Sean Paul 2017-03-16 14:26 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 16/41] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Sean Paul 2017-03-16 14:28 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 17/41] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Sean Paul 2017-03-16 14:34 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 18/41] drm/bridge: analogix_dp: Retry bridge enable when it failed Sean Paul 2017-03-16 14:45 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 19/41] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Sean Paul 2017-03-16 14:51 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 21/41] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Sean Paul 2017-03-22 8:29 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 22/41] drm/bridge: analogix_dp: Extend hpd check time to 100ms Sean Paul 2017-03-22 8:32 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 23/41] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Sean Paul 2017-03-22 8:46 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 24/41] drm/bridge: analogix_dp: Check dpcd write/read status Sean Paul 2017-03-22 9:00 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 25/41] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Sean Paul 2017-03-22 9:09 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 26/41] drm/bridge: analogix_dp: Reset aux channel if an error occurred Sean Paul 2017-03-22 9:14 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 35/41] drm/rockchip: analogix_dp: Fix invalid implementation of unbind Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 36/41] drm/bridge: analogix_dp: Add analogix_dp_shutdown Sean Paul 2017-03-10 4:32 ` [PATCH 37/41] drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 38/41] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Sean Paul 2017-03-22 10:34 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 41/41] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Sean Paul 2017-03-22 10:57 ` Andrzej Hajda 2017-03-22 15:59 ` Doug Anderson 2017-03-28 15:40 ` Javier Martinez Canillas 2017-03-10 4:32 ` [PATCH 07/41] drm/rockchip: Don't use atomic constructs for psr Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 09/41] drm/rockchip: Remove analogix psr worker Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-16 13:40 ` Andrzej Hajda 2017-03-16 13:40 ` Andrzej Hajda 2017-03-21 19:58 ` Sean Paul 2017-03-21 19:58 ` Sean Paul 2017-03-22 8:36 ` Andrzej Hajda 2017-03-22 8:36 ` Andrzej Hajda 2017-03-22 15:19 ` Sean Paul 2017-03-22 15:19 ` Sean Paul 2017-03-23 9:04 ` Andrzej Hajda 2017-03-23 9:04 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 11/41] drm/rockchip: add mutex vop lock Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 13/41] drm/rockchip: pre dither down when output bpc is 8bit Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 14/41] drm/rockchip: Only wait for panel ACK on PSR entry Sean Paul 2017-03-10 4:32 ` [PATCH 20/41] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Sean Paul 2017-03-16 14:54 ` Andrzej Hajda 2017-03-16 14:54 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 27/41] drm/rockchip: Restore psr->state when enable/disable psr failed Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` [PATCH 28/41] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Sean Paul 2017-03-22 9:17 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 29/41] drm/bridge: analogix_dp: Fix timeout of video streamclk config Sean Paul 2017-03-22 9:24 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 30/41] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Sean Paul 2017-03-22 9:29 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 31/41] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Sean Paul 2017-03-22 10:25 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 32/41] drm/rockchip: Flush PSR before committing modeset disables/enables Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-10 4:32 ` Sean Paul [this message] 2017-03-10 4:32 ` [PATCH 33/41] drm/rockchip: Disable VOP windows when PSR is active Sean Paul 2017-03-10 4:32 ` [PATCH 34/41] drm/bridge: analogix_dp: Allow master driver to cleanup in unbind Sean Paul 2017-03-10 7:09 ` Tomasz Figa 2017-03-10 14:24 ` Sean Paul 2017-03-10 4:32 ` [PATCH 39/41] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Sean Paul 2017-03-10 4:32 ` Sean Paul 2017-03-22 10:42 ` Andrzej Hajda 2017-03-22 10:42 ` Andrzej Hajda 2017-03-10 4:32 ` [PATCH 40/41] drm/bridge: analogix_dp: Properly log AUX CH errors Sean Paul 2017-03-22 10:47 ` Andrzej Hajda 2017-03-14 20:43 ` [PATCH 00/41] Chromebook Plus (aka kevin) kernel patches Sean Paul 2017-03-16 16:45 ` Enric Balletbo Serra
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170310043305.17216-34-seanpaul@chromium.org \ --to=seanpaul@chromium.org \ --cc=dianders@chromium.org \ --cc=dri-devel@lists.freedesktop.org \ --cc=hoegsberg@chromium.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-rockchip@lists.infradead.org \ --cc=tfiga@chromium.org \ --cc=wzz@rock-chips.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.