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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 14/15] drm/i915: Add g4x watermark tracepoint
Date: Fri, 21 Apr 2017 21:14:31 +0300	[thread overview]
Message-ID: <20170421181432.15216-15-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20170421181432.15216-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a tracepoint for watermark programming on g4x, similar to what we
have on vlv/chv. Should help in debugging watermark programming sequence
issues.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_trace.h | 49 +++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_pm.c   |  5 ++++
 2 files changed, 54 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 66404c5aee82..b24a83d43559 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -89,6 +89,55 @@ TRACE_EVENT(intel_memory_cxsr,
 		      __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
 );
 
+TRACE_EVENT(g4x_wm,
+	    TP_PROTO(struct intel_crtc *crtc, const struct g4x_wm_values *wm),
+	    TP_ARGS(crtc, wm),
+
+	    TP_STRUCT__entry(
+			     __field(enum pipe, pipe)
+			     __field(u32, frame)
+			     __field(u32, scanline)
+			     __field(u16, primary)
+			     __field(u16, sprite)
+			     __field(u16, cursor)
+			     __field(u16, sr_plane)
+			     __field(u16, sr_cursor)
+			     __field(u16, sr_fbc)
+			     __field(u16, hpll_plane)
+			     __field(u16, hpll_cursor)
+			     __field(u16, hpll_fbc)
+			     __field(bool, cxsr)
+			     __field(bool, hpll)
+			     __field(bool, fbc)
+			     ),
+
+	    TP_fast_assign(
+			   __entry->pipe = crtc->pipe;
+			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+										       crtc->pipe);
+			   __entry->scanline = intel_get_crtc_scanline(crtc);
+			   __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
+			   __entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];
+			   __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];
+			   __entry->sr_plane = wm->sr.plane;
+			   __entry->sr_cursor = wm->sr.cursor;
+			   __entry->sr_fbc = wm->sr.fbc;
+			   __entry->hpll_plane = wm->hpll.plane;
+			   __entry->hpll_cursor = wm->hpll.cursor;
+			   __entry->hpll_fbc = wm->hpll.fbc;
+			   __entry->cxsr = wm->cxsr;
+			   __entry->hpll = wm->hpll_en;
+			   __entry->fbc = wm->fbc_en;
+			   ),
+
+	    TP_printk("pipe %c, frame=%u, scanline=%u, wm %d/%d/%d, sr %s/%d/%d/%d, hpll %s/%d/%d/%d, fbc %s",
+		      pipe_name(__entry->pipe), __entry->frame, __entry->scanline,
+		      __entry->primary, __entry->sprite, __entry->cursor,
+		      yesno(__entry->cxsr), __entry->sr_plane, __entry->sr_cursor, __entry->sr_fbc,
+		      yesno(__entry->hpll), __entry->hpll_plane, __entry->hpll_cursor, __entry->hpll_fbc,
+		      yesno(__entry->fbc))
+);
+
 TRACE_EVENT(vlv_wm,
 	    TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm),
 	    TP_ARGS(crtc, wm),
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 957ef10b1569..ef0e9f8d4dbd 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -913,6 +913,11 @@ static int g4x_tlb_miss_wa(int fifo_size, int width, int cpp)
 static void g4x_write_wm_values(struct drm_i915_private *dev_priv,
 				const struct g4x_wm_values *wm)
 {
+	enum pipe pipe;
+
+	for_each_pipe(dev_priv, pipe)
+		trace_g4x_wm(intel_get_crtc_for_pipe(dev_priv, pipe), wm);
+
 	I915_WRITE(DSPFW1,
 		   FW_WM(wm->sr.plane, SR) |
 		   FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
-- 
2.10.2

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  parent reply	other threads:[~2017-04-21 18:15 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-21 18:14 [PATCH 00/15] drm/i915: Two stage watermarks for g4x ville.syrjala
2017-04-21 18:14 ` [PATCH 01/15] drm/i915: s/vlv_plane_wm_compute/vlv_raw_plane_wm_compute/ etc ville.syrjala
2017-04-21 18:14 ` [PATCH 02/15] drm/i915: Drop the debug message from vlv_get_fifo_size() ville.syrjala
2017-04-21 18:14 ` [PATCH 03/15] drm/i915: s/vlv_num_wm_levels/intel_wm_num_levels/ ville.syrjala
2017-04-21 18:14 ` [PATCH 04/15] drm/i915: Rename bunch of vlv_ watermark structures to g4x_ ville.syrjala
2017-04-21 18:14 ` [PATCH 05/15] drm/i915: Make vlv/chv watermark debug print less cryptic ville.syrjala
2017-04-21 18:14 ` [PATCH 06/15] drm/i915: Document CxSR ville.syrjala
2017-04-21 18:14 ` [PATCH 07/15] drm/i915: Fix cursor 'cpp' in watermark calculatins for old platforms ville.syrjala
2017-04-21 18:14 ` [PATCH 08/15] drm/i915: Fix the g4x watermark TLB miss workaround ville.syrjala
2017-04-21 18:14 ` [PATCH 09/15] drm/i915: Refactor the g4x TLB miss w/a to a helper ville.syrjala
2017-04-21 18:14 ` [PATCH 10/15] drm/i915: Refactor wm calculations ville.syrjala
2017-04-21 18:14 ` [PATCH 11/15] drm/i915: Apply the g4x TLB miss w/a to SR watermarks as well ville.syrjala
2017-04-21 18:14 ` [PATCH 12/15] drm/i915: Two stage watermarks for g4x ville.syrjala
2017-04-24  7:34   ` Maarten Lankhorst
2017-04-24 13:16     ` Ville Syrjälä
2017-05-10 16:40     ` Ville Syrjälä
2017-04-21 18:14 ` [PATCH 13/15] drm/i915: Enable HPLL watermarks on g4x ville.syrjala
2017-04-21 18:14 ` ville.syrjala [this message]
2017-04-21 18:14 ` [PATCH 15/15] drm/i915: Add support for sprites " ville.syrjala
2017-04-21 18:36 ` ✓ Fi.CI.BAT: success for drm/i915: Two stage watermarks for g4x Patchwork
2017-04-24 14:20 ` [PATCH 00/15] " Lofstedt, Marta

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