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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 03/15] drm/i915: s/vlv_num_wm_levels/intel_wm_num_levels/
Date: Fri, 21 Apr 2017 21:14:20 +0300	[thread overview]
Message-ID: <20170421181432.15216-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20170421181432.15216-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rename the VLV/CHV max_level->num_levels helper to have an intel_
prefix since it's not VLV/CHV specific and I'll want to use it on
other platforms as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2c63abe2039c..ee045be2a5e0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -648,6 +648,11 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
 	return wm_size;
 }
 
+static int intel_wm_num_levels(struct drm_i915_private *dev_priv)
+{
+	return dev_priv->wm.max_level + 1;
+}
+
 static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
 				   const struct intel_plane_state *plane_state)
 {
@@ -1136,18 +1141,13 @@ static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
 	return 0;
 }
 
-static int vlv_num_wm_levels(struct drm_i915_private *dev_priv)
-{
-	return dev_priv->wm.max_level + 1;
-}
-
 /* mark all levels starting from 'level' as invalid */
 static void vlv_invalidate_wms(struct intel_crtc *crtc,
 			       struct vlv_wm_state *wm_state, int level)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-	for (; level < vlv_num_wm_levels(dev_priv); level++) {
+	for (; level < intel_wm_num_levels(dev_priv); level++) {
 		enum plane_id plane_id;
 
 		for_each_plane_id_on_crtc(crtc, plane_id)
@@ -1174,7 +1174,7 @@ static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state,
 				 int level, enum plane_id plane_id, u16 value)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
-	int num_levels = vlv_num_wm_levels(dev_priv);
+	int num_levels = intel_wm_num_levels(dev_priv);
 	bool dirty = false;
 
 	for (; level < num_levels; level++) {
@@ -1192,7 +1192,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
 {
 	struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
 	enum plane_id plane_id = plane->id;
-	int num_levels = vlv_num_wm_levels(to_i915(plane->base.dev));
+	int num_levels = intel_wm_num_levels(to_i915(plane->base.dev));
 	int level;
 	bool dirty = false;
 
@@ -1306,7 +1306,7 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	}
 
 	/* initially allow all levels */
-	wm_state->num_levels = vlv_num_wm_levels(dev_priv);
+	wm_state->num_levels = intel_wm_num_levels(dev_priv);
 	/*
 	 * Note that enabling cxsr with no primary/sprite planes
 	 * enabled can wedge the pipe. Hence we only allow cxsr
-- 
2.10.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
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  parent reply	other threads:[~2017-04-21 18:14 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-21 18:14 [PATCH 00/15] drm/i915: Two stage watermarks for g4x ville.syrjala
2017-04-21 18:14 ` [PATCH 01/15] drm/i915: s/vlv_plane_wm_compute/vlv_raw_plane_wm_compute/ etc ville.syrjala
2017-04-21 18:14 ` [PATCH 02/15] drm/i915: Drop the debug message from vlv_get_fifo_size() ville.syrjala
2017-04-21 18:14 ` ville.syrjala [this message]
2017-04-21 18:14 ` [PATCH 04/15] drm/i915: Rename bunch of vlv_ watermark structures to g4x_ ville.syrjala
2017-04-21 18:14 ` [PATCH 05/15] drm/i915: Make vlv/chv watermark debug print less cryptic ville.syrjala
2017-04-21 18:14 ` [PATCH 06/15] drm/i915: Document CxSR ville.syrjala
2017-04-21 18:14 ` [PATCH 07/15] drm/i915: Fix cursor 'cpp' in watermark calculatins for old platforms ville.syrjala
2017-04-21 18:14 ` [PATCH 08/15] drm/i915: Fix the g4x watermark TLB miss workaround ville.syrjala
2017-04-21 18:14 ` [PATCH 09/15] drm/i915: Refactor the g4x TLB miss w/a to a helper ville.syrjala
2017-04-21 18:14 ` [PATCH 10/15] drm/i915: Refactor wm calculations ville.syrjala
2017-04-21 18:14 ` [PATCH 11/15] drm/i915: Apply the g4x TLB miss w/a to SR watermarks as well ville.syrjala
2017-04-21 18:14 ` [PATCH 12/15] drm/i915: Two stage watermarks for g4x ville.syrjala
2017-04-24  7:34   ` Maarten Lankhorst
2017-04-24 13:16     ` Ville Syrjälä
2017-05-10 16:40     ` Ville Syrjälä
2017-04-21 18:14 ` [PATCH 13/15] drm/i915: Enable HPLL watermarks on g4x ville.syrjala
2017-04-21 18:14 ` [PATCH 14/15] drm/i915: Add g4x watermark tracepoint ville.syrjala
2017-04-21 18:14 ` [PATCH 15/15] drm/i915: Add support for sprites on g4x ville.syrjala
2017-04-21 18:36 ` ✓ Fi.CI.BAT: success for drm/i915: Two stage watermarks for g4x Patchwork
2017-04-24 14:20 ` [PATCH 00/15] " Lofstedt, Marta

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