From: Antoine Tenart <antoine.tenart@free-electrons.com> To: herbert@gondor.apana.org.au, davem@davemloft.net, jason@lakedaemon.net, andrew@lunn.ch, gregory.clement@free-electrons.com, sebastian.hesselbarth@gmail.com Cc: Antoine Tenart <antoine.tenart@free-electrons.com>, linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thomas.petazzoni@free-electrons.com, boris.brezillon@free-electrons.com, oferh@marvell.com, igall@marvell.com, nadavh@marvell.com, robin.murphy@arm.com Subject: [PATCH v3 1/3] Documentation/bindings: Document the SafeXel cryptographic engine driver Date: Mon, 24 Apr 2017 09:54:05 +0200 [thread overview] Message-ID: <20170424075407.19730-2-antoine.tenart@free-electrons.com> (raw) In-Reply-To: <20170424075407.19730-1-antoine.tenart@free-electrons.com> The Inside Secure Safexcel cryptographic engine is found on some Marvell SoCs (7k/8k). Document the bindings used by its driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> --- .../bindings/crypto/inside-secure-safexcel.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt new file mode 100644 index 000000000000..ff56b9384fcc --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt @@ -0,0 +1,27 @@ +Inside Secure SafeXcel cryptographic engine + +Required properties: +- compatible: Should be "inside-secure,safexcel-eip197". +- reg: Base physical address of the engine and length of memory mapped region. +- interrupts: Interrupt numbers for the rings and engine. +- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". + +Optional properties: +- clocks: Reference to the crypto engine clock. + +Example: + + crypto: crypto@800000 { + compatible = "inside-secure,safexcel-eip197"; + reg = <0x800000 0x200000>; + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", + "eip"; + clocks = <&cpm_syscon0 1 26>; + status = "disabled"; + }; -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: antoine.tenart@free-electrons.com (Antoine Tenart) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/3] Documentation/bindings: Document the SafeXel cryptographic engine driver Date: Mon, 24 Apr 2017 09:54:05 +0200 [thread overview] Message-ID: <20170424075407.19730-2-antoine.tenart@free-electrons.com> (raw) In-Reply-To: <20170424075407.19730-1-antoine.tenart@free-electrons.com> The Inside Secure Safexcel cryptographic engine is found on some Marvell SoCs (7k/8k). Document the bindings used by its driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> --- .../bindings/crypto/inside-secure-safexcel.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt new file mode 100644 index 000000000000..ff56b9384fcc --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt @@ -0,0 +1,27 @@ +Inside Secure SafeXcel cryptographic engine + +Required properties: +- compatible: Should be "inside-secure,safexcel-eip197". +- reg: Base physical address of the engine and length of memory mapped region. +- interrupts: Interrupt numbers for the rings and engine. +- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". + +Optional properties: +- clocks: Reference to the crypto engine clock. + +Example: + + crypto: crypto at 800000 { + compatible = "inside-secure,safexcel-eip197"; + reg = <0x800000 0x200000>; + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", + "eip"; + clocks = <&cpm_syscon0 1 26>; + status = "disabled"; + }; -- 2.11.0
next prev parent reply other threads:[~2017-04-24 7:54 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-24 7:54 [PATCH v3 0/3] arm64: marvell: add cryptographic engine support for 7k/8k Antoine Tenart 2017-04-24 7:54 ` Antoine Tenart 2017-04-24 7:54 ` Antoine Tenart [this message] 2017-04-24 7:54 ` [PATCH v3 1/3] Documentation/bindings: Document the SafeXel cryptographic engine driver Antoine Tenart 2017-05-03 16:36 ` Marc Zyngier 2017-05-03 16:36 ` Marc Zyngier 2017-05-22 14:30 ` Antoine Tenart 2017-05-22 14:30 ` Antoine Tenart 2017-05-22 14:48 ` Marc Zyngier 2017-05-22 14:48 ` Marc Zyngier 2017-05-22 14:54 ` Antoine Tenart 2017-05-22 14:54 ` Antoine Tenart 2017-05-22 15:02 ` Marc Zyngier 2017-05-22 15:02 ` Marc Zyngier 2017-05-22 19:37 ` Thomas Petazzoni 2017-05-22 19:37 ` Thomas Petazzoni 2017-05-23 11:13 ` Marc Zyngier 2017-05-23 11:13 ` Marc Zyngier 2017-05-23 12:56 ` Thomas Petazzoni 2017-05-23 12:56 ` Thomas Petazzoni 2017-04-24 7:54 ` [PATCH v3 2/3] crypto: inside-secure: add SafeXcel EIP197 crypto " Antoine Tenart 2017-04-24 7:54 ` Antoine Tenart 2017-04-24 8:50 ` Igal Liberman 2017-04-24 8:50 ` Igal Liberman 2017-04-24 8:57 ` Antoine Tenart 2017-04-24 8:57 ` Antoine Tenart 2017-05-03 17:14 ` Robin Murphy 2017-05-03 17:14 ` Robin Murphy 2017-05-08 8:46 ` Igal Liberman 2017-05-08 8:46 ` Igal Liberman 2017-04-24 12:59 ` Stephan Müller 2017-04-24 12:59 ` Stephan Müller 2017-04-25 6:53 ` Antoine Tenart 2017-04-25 6:53 ` Antoine Tenart 2017-05-03 11:57 ` Robin Murphy 2017-05-03 11:57 ` Robin Murphy 2017-05-03 14:03 ` Antoine Tenart 2017-05-03 14:03 ` Antoine Tenart 2017-04-24 7:54 ` [PATCH v3 3/3] MAINTAINERS: add a maintainer for the Inside Secure crypto driver Antoine Tenart 2017-04-24 7:54 ` Antoine Tenart
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