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From: Alan Tull <atull@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Moritz Fischer <moritz.fischer@ettus.com>,
	Alan Tull <atull@kernel.org>,
	linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org,
	Anatolij Gustschin <agust@denx.de>,
	Joshua Clayton <stillcompiling@gmail.com>
Subject: [PATCH v2 03/11] fpga: Add flag to indicate SPI bitstream is bit-reversed
Date: Wed, 14 Jun 2017 10:36:27 -0500	[thread overview]
Message-ID: <20170614153635.2763-4-atull@kernel.org> (raw)
In-Reply-To: <20170614153635.2763-1-atull@kernel.org>

From: Anatolij Gustschin <agust@denx.de>

Add a flag that is passed to the write_init() callback,
indicating that the SPI bitstream starts with LSB first.
SPI controllers usually send data with MSB first. If an
FPGA expects bitstream data as LSB first, the data must
be reversed either by the SPI controller or by the driver.

Alternatively the bitstream could be prepared as bit-reversed
to avoid the bit-swapping while sending. This flag indicates
such bit-reversed SPI bitstream. The low-level driver will
deal with the flag and perform bit-reversing if needed.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Alan Tull <atull@kernel.org>
---
 include/linux/fpga/fpga-mgr.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index b4ac24c..01c348c 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -67,10 +67,12 @@ enum fpga_mgr_states {
  * FPGA Manager flags
  * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
  * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
+ * FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first
  */
 #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
 #define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
 #define FPGA_MGR_ENCRYPTED_BITSTREAM	BIT(2)
+#define FPGA_MGR_BITSTREAM_LSB_FIRST	BIT(3)
 
 /**
  * struct fpga_image_info - information specific to a FPGA image
-- 
2.7.4

  parent reply	other threads:[~2017-06-14 15:38 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-14 15:36 [PATCH v2 00/11] patches for fpga Alan Tull
2017-06-14 15:36 ` [PATCH v2 01/11] dt-bindings: fpga: Add bindings document for Xilinx LogiCore PR Decoupler Alan Tull
2017-06-14 15:36 ` [PATCH v2 02/11] Make FPGA a menuconfig to ease disabling it all Alan Tull
2017-06-14 15:36 ` Alan Tull [this message]
2017-06-14 15:36 ` [PATCH v2 04/11] doc: dt: document altera-passive-serial binding Alan Tull
2017-06-14 15:36 ` [PATCH v2 05/11] fpga manager: Add altera-ps-spi driver for Altera FPGAs Alan Tull
2017-06-14 15:36 ` [PATCH v2 06/11] ARM: dts: imx6q-evi: support altera-ps-spi Alan Tull
2017-06-14 15:36 ` [PATCH v2 07/11] lib: add bitrev8x4() Alan Tull
2017-06-14 15:36 ` [PATCH v2 08/11] fpga-manager: altera-ps-spi: use bitrev8x4 Alan Tull
2017-06-14 15:36 ` [PATCH v2 09/11] of: Add vendor prefix for Lattice Semiconductor Alan Tull
2017-06-14 15:36 ` [PATCH v2 10/11] fpga: Add flag to indicate bitstream needs decompression Alan Tull
2017-06-14 15:36 ` [PATCH v2 11/11] fpga manager: Add Altera CvP driver Alan Tull
2017-07-04  9:03 ` [PATCH v2 00/11] patches for fpga Anatolij Gustschin
2017-07-04  9:12   ` Greg Kroah-Hartman
2017-07-04  9:30     ` Anatolij Gustschin

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