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From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, maarten.lankhorst@intel.com
Subject: [PATCH 2/8] drm/i915: Always perform internal fixed16 division in 64 bits
Date: Wed, 21 Jun 2017 11:44:10 +0530	[thread overview]
Message-ID: <20170621061416.7263-3-mahesh1.kumar@intel.com> (raw)
In-Reply-To: <20170621061416.7263-1-mahesh1.kumar@intel.com>

This patch combines fixed_16_16_div & fixed_16_16_div_u64 wrappers.
And new fixed_16_16_div wrapper always performs division operation in
u64 internally, to avoid any data loss which was happening in earlier
version of wrapper.
earlier wrapper was converting u32 to fixed16 in 32 bit so we were
loosing 16-MSB data.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 9 ---------
 drivers/gpu/drm/i915/intel_pm.c | 4 ++--
 2 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9e93b9fa3e0f..777f75b7b275 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -197,15 +197,6 @@ static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
 
 static inline uint_fixed_16_16_t fixed_16_16_div(uint32_t val, uint32_t d)
 {
-	uint_fixed_16_16_t fp, res;
-
-	fp = u32_to_fixed_16_16(val);
-	res.val = DIV_ROUND_UP(fp.val, d);
-	return res;
-}
-
-static inline uint_fixed_16_16_t fixed_16_16_div_u64(uint32_t val, uint32_t d)
-{
 	uint64_t interm_val;
 
 	interm_val = (uint64_t)val << 16;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b5b7372fcddc..49e180448742 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4275,7 +4275,7 @@ static uint_fixed_16_16_t skl_wm_method1(uint32_t pixel_rate, uint8_t cpp,
 		return FP_16_16_MAX;
 
 	wm_intermediate_val = latency * pixel_rate * cpp;
-	ret = fixed_16_16_div_u64(wm_intermediate_val, 1000 * 512);
+	ret = fixed_16_16_div(wm_intermediate_val, 1000 * 512);
 	return ret;
 }
 
@@ -4313,7 +4313,7 @@ intel_get_linetime_us(struct intel_crtc_state *cstate)
 		return u32_to_fixed_16_16(0);
 
 	crtc_htotal = cstate->base.adjusted_mode.crtc_htotal;
-	linetime_us = fixed_16_16_div_u64(crtc_htotal * 1000, pixel_rate);
+	linetime_us = fixed_16_16_div(crtc_htotal * 1000, pixel_rate);
 
 	return linetime_us;
 }
-- 
2.13.0

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  parent reply	other threads:[~2017-06-21  6:10 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-21  6:14 [PATCH 0/8] Fixed16.16 wrapper cleanup & wm optimization Mahesh Kumar
2017-06-21  6:14 ` [PATCH 1/8] drm/i915: take-out common clamping code of fixed16 wrappers Mahesh Kumar
2017-06-21  6:14 ` Mahesh Kumar [this message]
2017-06-21  6:14 ` [PATCH 3/8] drm/i915: cleanup fixed-point wrappers naming Mahesh Kumar
2017-06-21  6:14 ` [PATCH 4/8] drm/i915: Addition wrapper for fixed16.16 operation Mahesh Kumar
2017-06-21  9:40   ` Lankhorst, Maarten
2017-06-21 14:32     ` Mahesh Kumar
2017-06-21  6:14 ` [PATCH 5/8] drm/i915/skl+: WM calculation don't require height Mahesh Kumar
2017-06-21  6:14 ` [PATCH 6/8] drm/i915/skl+: unify cpp value in WM calculation Mahesh Kumar
2017-06-21  6:14 ` [PATCH 7/8] drm/i915/skl+: Optimize " Mahesh Kumar
2017-06-21  6:14 ` [PATCH 8/8] drm/i915/gen10: Calculate and enable transition WM Mahesh Kumar
2017-06-21  6:29 ` ✓ Fi.CI.BAT: success for Fixed16.16 wrapper cleanup & wm optimization (rev3) Patchwork

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