From: Eric Anholt <eric@anholt.net> To: dri-devel@lists.freedesktop.org, Philippe CORNU <philippe.cornu@st.com>, Alexandre Torgue <alexandre.torgue@st.com>, Yannick Fertre <yannick.fertre@st.com> Cc: linux-kernel@vger.kernel.org, Eric Anholt <eric@anholt.net> Subject: [PATCH 1/2] drm/stm: Fix leak of pixel clock enable in some error paths. Date: Thu, 22 Jun 2017 10:56:35 -0700 [thread overview] Message-ID: <20170622175636.22723-1-eric@anholt.net> (raw) In-Reply-To: <1497889685-27349-2-git-send-email-philippe.cornu@st.com> The clock gets enabled early on in init, since it's required in order to read registers. If only devm_clk_prepare_enable() was a thing! Signed-off-by: Eric Anholt <eric@anholt.net> --- This fixup, if you like, I would slip in before patch 1 of your series. drivers/gpu/drm/stm/ltdc.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 8aa05860029f..7d7e889f09c3 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -908,13 +908,15 @@ int ltdc_load(struct drm_device *ddev) if (of_address_to_resource(np, 0, &res)) { DRM_ERROR("Unable to get resource\n"); - return -ENODEV; + ret = -ENODEV; + goto err; } ldev->regs = devm_ioremap_resource(dev, &res); if (IS_ERR(ldev->regs)) { DRM_ERROR("Unable to get ltdc registers\n"); - return PTR_ERR(ldev->regs); + ret = PTR_ERR(ldev->regs); + goto err; } for (i = 0; i < MAX_IRQ; i++) { @@ -927,7 +929,7 @@ int ltdc_load(struct drm_device *ddev) dev_name(dev), ddev); if (ret) { DRM_ERROR("Failed to register LTDC interrupt\n"); - return ret; + goto err; } } @@ -942,7 +944,7 @@ int ltdc_load(struct drm_device *ddev) if (ret) { DRM_ERROR("hardware identifier (0x%08x) not supported!\n", ldev->caps.hw_version); - return ret; + goto err; } DRM_INFO("ltdc hw version 0x%08x - ready\n", ldev->caps.hw_version); -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Eric Anholt <eric@anholt.net> To: dri-devel@lists.freedesktop.org, Philippe CORNU <philippe.cornu@st.com>, Alexandre Torgue <alexandre.torgue@st.com>, Yannick Fertre <yannick.fertre@st.com> Cc: linux-kernel@vger.kernel.org Subject: [PATCH 1/2] drm/stm: Fix leak of pixel clock enable in some error paths. Date: Thu, 22 Jun 2017 10:56:35 -0700 [thread overview] Message-ID: <20170622175636.22723-1-eric@anholt.net> (raw) In-Reply-To: <1497889685-27349-2-git-send-email-philippe.cornu@st.com> The clock gets enabled early on in init, since it's required in order to read registers. If only devm_clk_prepare_enable() was a thing! Signed-off-by: Eric Anholt <eric@anholt.net> --- This fixup, if you like, I would slip in before patch 1 of your series. drivers/gpu/drm/stm/ltdc.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 8aa05860029f..7d7e889f09c3 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -908,13 +908,15 @@ int ltdc_load(struct drm_device *ddev) if (of_address_to_resource(np, 0, &res)) { DRM_ERROR("Unable to get resource\n"); - return -ENODEV; + ret = -ENODEV; + goto err; } ldev->regs = devm_ioremap_resource(dev, &res); if (IS_ERR(ldev->regs)) { DRM_ERROR("Unable to get ltdc registers\n"); - return PTR_ERR(ldev->regs); + ret = PTR_ERR(ldev->regs); + goto err; } for (i = 0; i < MAX_IRQ; i++) { @@ -927,7 +929,7 @@ int ltdc_load(struct drm_device *ddev) dev_name(dev), ddev); if (ret) { DRM_ERROR("Failed to register LTDC interrupt\n"); - return ret; + goto err; } } @@ -942,7 +944,7 @@ int ltdc_load(struct drm_device *ddev) if (ret) { DRM_ERROR("hardware identifier (0x%08x) not supported!\n", ldev->caps.hw_version); - return ret; + goto err; } DRM_INFO("ltdc hw version 0x%08x - ready\n", ldev->caps.hw_version); -- 2.11.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2017-06-22 17:56 UTC|newest] Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-19 16:27 [PATCH v4 0/6] STM32 DSI HOST Philippe CORNU 2017-06-19 16:27 ` Philippe CORNU 2017-06-19 16:28 ` [PATCH v4 2/6] dt-bindings: display: Add Synopsys DW MIPI DSI DRM bridge driver Philippe CORNU 2017-06-19 16:28 ` Philippe CORNU [not found] ` <1497889685-27349-3-git-send-email-philippe.cornu-qxv4g6HH51o@public.gmane.org> 2017-06-23 21:25 ` Rob Herring 2017-06-23 21:25 ` Rob Herring 2017-06-26 16:27 ` Philippe CORNU 2017-06-26 16:27 ` Philippe CORNU 2017-06-19 16:28 ` [PATCH v4 3/6] drm/bridge/synopsys: Add MIPI DSI host controller bridge Philippe CORNU 2017-06-19 16:28 ` Philippe CORNU [not found] ` <1497889685-27349-4-git-send-email-philippe.cornu-qxv4g6HH51o@public.gmane.org> 2017-06-28 6:44 ` Archit Taneja 2017-06-28 6:44 ` Archit Taneja 2017-06-28 9:05 ` Andrzej Hajda 2017-06-28 9:05 ` Andrzej Hajda 2017-07-03 6:21 ` Archit Taneja 2017-07-03 6:21 ` Archit Taneja 2017-06-29 14:43 ` Philippe CORNU 2017-06-29 14:43 ` Philippe CORNU 2017-07-03 6:31 ` Archit Taneja 2017-07-03 6:31 ` Archit Taneja 2017-07-03 9:03 ` Philippe CORNU 2017-07-03 9:03 ` Philippe CORNU [not found] ` <1497889685-27349-1-git-send-email-philippe.cornu-qxv4g6HH51o@public.gmane.org> 2017-06-19 16:28 ` [PATCH v4 1/6] drm/stm: ltdc: Add panel-bridge support Philippe CORNU 2017-06-19 16:28 ` Philippe CORNU 2017-06-22 17:56 ` Eric Anholt [this message] 2017-06-22 17:56 ` [PATCH 1/2] drm/stm: Fix leak of pixel clock enable in some error paths Eric Anholt 2017-06-22 17:56 ` [PATCH 2/2] drm/stm: Fixup for "drm/stm: ltdc: Add panel-bridge support" Eric Anholt 2017-06-22 17:56 ` Eric Anholt 2017-06-23 14:46 ` Philippe CORNU 2017-06-23 18:18 ` Eric Anholt 2017-06-23 18:18 ` Eric Anholt [not found] ` <1497889685-27349-2-git-send-email-philippe.cornu-qxv4g6HH51o@public.gmane.org> 2017-06-28 4:43 ` [PATCH v4 1/6] drm/stm: ltdc: Add panel-bridge support Archit Taneja 2017-06-28 4:43 ` Archit Taneja 2017-06-19 16:28 ` [PATCH v4 4/6] dt-bindings: display: stm32: remove st-display-subsystem parent node requirement Philippe CORNU 2017-06-19 16:28 ` Philippe CORNU 2017-06-19 16:28 ` [PATCH v4 5/6] dt-bindings: display: stm32: Add DSI host driver Philippe CORNU 2017-06-19 16:28 ` Philippe CORNU 2017-06-23 21:28 ` Rob Herring 2017-06-23 21:28 ` Rob Herring 2017-06-19 16:28 ` [PATCH v4 6/6] drm/stm: Add STM32 " Philippe CORNU 2017-06-19 16:28 ` Philippe CORNU 2017-06-28 6:48 ` Archit Taneja 2017-06-28 6:48 ` Archit Taneja
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