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From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: Christoffer Dall <christoffer.dall@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Eric Auger <eric.auger@redhat.com>,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v2 21/52] irqchip/gic-v3-its: Add VPE irq domain [de]activation
Date: Wed, 28 Jun 2017 16:03:40 +0100	[thread overview]
Message-ID: <20170628150411.15846-22-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170628150411.15846-1-marc.zyngier@arm.com>

On activation, a VPE is mapped using the VMAPP command, followed
by a VINVALL for a good measure. On deactivation, the VPE is
simply unmapped.

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 102 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 102 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 58f3b19ec462..276602efdfa0 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -217,6 +217,16 @@ struct its_cmd_desc {
 
 		struct {
 			struct its_vpe *vpe;
+		} its_vinvall_cmd;
+
+		struct {
+			struct its_vpe *vpe;
+			struct its_collection *col;
+			bool valid;
+		} its_vmapp_cmd;
+
+		struct {
+			struct its_vpe *vpe;
 			struct its_device *dev;
 			u32 virt_id;
 			u32 event_id;
@@ -320,6 +330,16 @@ static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid)
 	its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0);
 }
 
+static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa)
+{
+	its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 50, 16);
+}
+
+static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size)
+{
+	its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0);
+}
+
 static inline void its_fixup_cmd(struct its_cmd_block *cmd)
 {
 	/* Let's fixup BE commands */
@@ -478,6 +498,36 @@ static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd,
 	return NULL;
 }
 
+static struct its_vpe *its_build_vinvall_cmd(struct its_cmd_block *cmd,
+					     struct its_cmd_desc *desc)
+{
+	its_encode_cmd(cmd, GITS_CMD_VINVALL);
+	its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id);
+
+	its_fixup_cmd(cmd);
+
+	return desc->its_vinvall_cmd.vpe;
+}
+
+static struct its_vpe *its_build_vmapp_cmd(struct its_cmd_block *cmd,
+					   struct its_cmd_desc *desc)
+{
+	unsigned long vpt_addr;
+
+	vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page));
+
+	its_encode_cmd(cmd, GITS_CMD_VMAPP);
+	its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id);
+	its_encode_valid(cmd, desc->its_vmapp_cmd.valid);
+	its_encode_target(cmd, desc->its_vmapp_cmd.col->target_address);
+	its_encode_vpt_addr(cmd, vpt_addr);
+	its_encode_vpt_size(cmd, LPI_NRBITS - 1);
+
+	its_fixup_cmd(cmd);
+
+	return desc->its_vmapp_cmd.vpe;
+}
+
 static struct its_vpe *its_build_vmapti_cmd(struct its_cmd_block *cmd,
 					    struct its_cmd_desc *desc)
 {
@@ -799,6 +849,37 @@ static void its_send_vmovi(struct its_device *dev, u32 id)
 	its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc);
 }
 
+static void its_send_vmapp(struct its_vpe *vpe, bool valid)
+{
+	struct its_cmd_desc desc;
+	struct its_node *its;
+
+	desc.its_vmapp_cmd.vpe = vpe;
+	desc.its_vmapp_cmd.valid = valid;
+
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+
+		desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx];
+		its_send_single_vcommand(its, its_build_vmapp_cmd, &desc);
+	}
+}
+
+static void its_send_vinvall(struct its_vpe *vpe)
+{
+	struct its_cmd_desc desc;
+	struct its_node *its;
+
+	desc.its_vinvall_cmd.vpe = vpe;
+
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+		its_send_single_vcommand(its, its_build_vinvall_cmd, &desc);
+	}
+}
+
 /*
  * irqchip functions - assumes MSI, mostly.
  */
@@ -2194,9 +2275,30 @@ static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq
 	return err;
 }
 
+static void its_vpe_irq_domain_activate(struct irq_domain *domain,
+					struct irq_data *d)
+{
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
+
+	/* Map the VPE to the first possible CPU */
+	vpe->col_idx = cpumask_first(cpu_online_mask);
+	its_send_vmapp(vpe, true);
+	its_send_vinvall(vpe);
+}
+
+static void its_vpe_irq_domain_deactivate(struct irq_domain *domain,
+					  struct irq_data *d)
+{
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
+
+	its_send_vmapp(vpe, false);
+}
+
 static const struct irq_domain_ops its_vpe_domain_ops = {
 	.alloc			= its_vpe_irq_domain_alloc,
 	.free			= its_vpe_irq_domain_free,
+	.activate		= its_vpe_irq_domain_activate,
+	.deactivate		= its_vpe_irq_domain_deactivate,
 };
 
 static int its_force_quiescent(void __iomem *base)
-- 
2.11.0

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: Jason Cooper <jason@lakedaemon.net>,
	Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH v2 21/52] irqchip/gic-v3-its: Add VPE irq domain [de]activation
Date: Wed, 28 Jun 2017 16:03:40 +0100	[thread overview]
Message-ID: <20170628150411.15846-22-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170628150411.15846-1-marc.zyngier@arm.com>

On activation, a VPE is mapped using the VMAPP command, followed
by a VINVALL for a good measure. On deactivation, the VPE is
simply unmapped.

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 102 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 102 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 58f3b19ec462..276602efdfa0 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -217,6 +217,16 @@ struct its_cmd_desc {
 
 		struct {
 			struct its_vpe *vpe;
+		} its_vinvall_cmd;
+
+		struct {
+			struct its_vpe *vpe;
+			struct its_collection *col;
+			bool valid;
+		} its_vmapp_cmd;
+
+		struct {
+			struct its_vpe *vpe;
 			struct its_device *dev;
 			u32 virt_id;
 			u32 event_id;
@@ -320,6 +330,16 @@ static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid)
 	its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0);
 }
 
+static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa)
+{
+	its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 50, 16);
+}
+
+static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size)
+{
+	its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0);
+}
+
 static inline void its_fixup_cmd(struct its_cmd_block *cmd)
 {
 	/* Let's fixup BE commands */
@@ -478,6 +498,36 @@ static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd,
 	return NULL;
 }
 
+static struct its_vpe *its_build_vinvall_cmd(struct its_cmd_block *cmd,
+					     struct its_cmd_desc *desc)
+{
+	its_encode_cmd(cmd, GITS_CMD_VINVALL);
+	its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id);
+
+	its_fixup_cmd(cmd);
+
+	return desc->its_vinvall_cmd.vpe;
+}
+
+static struct its_vpe *its_build_vmapp_cmd(struct its_cmd_block *cmd,
+					   struct its_cmd_desc *desc)
+{
+	unsigned long vpt_addr;
+
+	vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page));
+
+	its_encode_cmd(cmd, GITS_CMD_VMAPP);
+	its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id);
+	its_encode_valid(cmd, desc->its_vmapp_cmd.valid);
+	its_encode_target(cmd, desc->its_vmapp_cmd.col->target_address);
+	its_encode_vpt_addr(cmd, vpt_addr);
+	its_encode_vpt_size(cmd, LPI_NRBITS - 1);
+
+	its_fixup_cmd(cmd);
+
+	return desc->its_vmapp_cmd.vpe;
+}
+
 static struct its_vpe *its_build_vmapti_cmd(struct its_cmd_block *cmd,
 					    struct its_cmd_desc *desc)
 {
@@ -799,6 +849,37 @@ static void its_send_vmovi(struct its_device *dev, u32 id)
 	its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc);
 }
 
+static void its_send_vmapp(struct its_vpe *vpe, bool valid)
+{
+	struct its_cmd_desc desc;
+	struct its_node *its;
+
+	desc.its_vmapp_cmd.vpe = vpe;
+	desc.its_vmapp_cmd.valid = valid;
+
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+
+		desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx];
+		its_send_single_vcommand(its, its_build_vmapp_cmd, &desc);
+	}
+}
+
+static void its_send_vinvall(struct its_vpe *vpe)
+{
+	struct its_cmd_desc desc;
+	struct its_node *its;
+
+	desc.its_vinvall_cmd.vpe = vpe;
+
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+		its_send_single_vcommand(its, its_build_vinvall_cmd, &desc);
+	}
+}
+
 /*
  * irqchip functions - assumes MSI, mostly.
  */
@@ -2194,9 +2275,30 @@ static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq
 	return err;
 }
 
+static void its_vpe_irq_domain_activate(struct irq_domain *domain,
+					struct irq_data *d)
+{
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
+
+	/* Map the VPE to the first possible CPU */
+	vpe->col_idx = cpumask_first(cpu_online_mask);
+	its_send_vmapp(vpe, true);
+	its_send_vinvall(vpe);
+}
+
+static void its_vpe_irq_domain_deactivate(struct irq_domain *domain,
+					  struct irq_data *d)
+{
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
+
+	its_send_vmapp(vpe, false);
+}
+
 static const struct irq_domain_ops its_vpe_domain_ops = {
 	.alloc			= its_vpe_irq_domain_alloc,
 	.free			= its_vpe_irq_domain_free,
+	.activate		= its_vpe_irq_domain_activate,
+	.deactivate		= its_vpe_irq_domain_deactivate,
 };
 
 static int its_force_quiescent(void __iomem *base)
-- 
2.11.0

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 21/52] irqchip/gic-v3-its: Add VPE irq domain [de]activation
Date: Wed, 28 Jun 2017 16:03:40 +0100	[thread overview]
Message-ID: <20170628150411.15846-22-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170628150411.15846-1-marc.zyngier@arm.com>

On activation, a VPE is mapped using the VMAPP command, followed
by a VINVALL for a good measure. On deactivation, the VPE is
simply unmapped.

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 102 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 102 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 58f3b19ec462..276602efdfa0 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -217,6 +217,16 @@ struct its_cmd_desc {
 
 		struct {
 			struct its_vpe *vpe;
+		} its_vinvall_cmd;
+
+		struct {
+			struct its_vpe *vpe;
+			struct its_collection *col;
+			bool valid;
+		} its_vmapp_cmd;
+
+		struct {
+			struct its_vpe *vpe;
 			struct its_device *dev;
 			u32 virt_id;
 			u32 event_id;
@@ -320,6 +330,16 @@ static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid)
 	its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0);
 }
 
+static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa)
+{
+	its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 50, 16);
+}
+
+static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size)
+{
+	its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0);
+}
+
 static inline void its_fixup_cmd(struct its_cmd_block *cmd)
 {
 	/* Let's fixup BE commands */
@@ -478,6 +498,36 @@ static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd,
 	return NULL;
 }
 
+static struct its_vpe *its_build_vinvall_cmd(struct its_cmd_block *cmd,
+					     struct its_cmd_desc *desc)
+{
+	its_encode_cmd(cmd, GITS_CMD_VINVALL);
+	its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id);
+
+	its_fixup_cmd(cmd);
+
+	return desc->its_vinvall_cmd.vpe;
+}
+
+static struct its_vpe *its_build_vmapp_cmd(struct its_cmd_block *cmd,
+					   struct its_cmd_desc *desc)
+{
+	unsigned long vpt_addr;
+
+	vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page));
+
+	its_encode_cmd(cmd, GITS_CMD_VMAPP);
+	its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id);
+	its_encode_valid(cmd, desc->its_vmapp_cmd.valid);
+	its_encode_target(cmd, desc->its_vmapp_cmd.col->target_address);
+	its_encode_vpt_addr(cmd, vpt_addr);
+	its_encode_vpt_size(cmd, LPI_NRBITS - 1);
+
+	its_fixup_cmd(cmd);
+
+	return desc->its_vmapp_cmd.vpe;
+}
+
 static struct its_vpe *its_build_vmapti_cmd(struct its_cmd_block *cmd,
 					    struct its_cmd_desc *desc)
 {
@@ -799,6 +849,37 @@ static void its_send_vmovi(struct its_device *dev, u32 id)
 	its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc);
 }
 
+static void its_send_vmapp(struct its_vpe *vpe, bool valid)
+{
+	struct its_cmd_desc desc;
+	struct its_node *its;
+
+	desc.its_vmapp_cmd.vpe = vpe;
+	desc.its_vmapp_cmd.valid = valid;
+
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+
+		desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx];
+		its_send_single_vcommand(its, its_build_vmapp_cmd, &desc);
+	}
+}
+
+static void its_send_vinvall(struct its_vpe *vpe)
+{
+	struct its_cmd_desc desc;
+	struct its_node *its;
+
+	desc.its_vinvall_cmd.vpe = vpe;
+
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+		its_send_single_vcommand(its, its_build_vinvall_cmd, &desc);
+	}
+}
+
 /*
  * irqchip functions - assumes MSI, mostly.
  */
@@ -2194,9 +2275,30 @@ static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq
 	return err;
 }
 
+static void its_vpe_irq_domain_activate(struct irq_domain *domain,
+					struct irq_data *d)
+{
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
+
+	/* Map the VPE to the first possible CPU */
+	vpe->col_idx = cpumask_first(cpu_online_mask);
+	its_send_vmapp(vpe, true);
+	its_send_vinvall(vpe);
+}
+
+static void its_vpe_irq_domain_deactivate(struct irq_domain *domain,
+					  struct irq_data *d)
+{
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
+
+	its_send_vmapp(vpe, false);
+}
+
 static const struct irq_domain_ops its_vpe_domain_ops = {
 	.alloc			= its_vpe_irq_domain_alloc,
 	.free			= its_vpe_irq_domain_free,
+	.activate		= its_vpe_irq_domain_activate,
+	.deactivate		= its_vpe_irq_domain_deactivate,
 };
 
 static int its_force_quiescent(void __iomem *base)
-- 
2.11.0

  parent reply	other threads:[~2017-06-28 15:17 UTC|newest]

Thread overview: 171+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-28 15:03 [PATCH v2 00/52] irqchip: KVM: Add support for GICv4 Marc Zyngier
2017-06-28 15:03 ` Marc Zyngier
2017-06-28 15:03 ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 01/52] genirq: Let irq_set_vcpu_affinity() iterate over hierarchy Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-07-04 21:15   ` Thomas Gleixner
2017-07-04 21:15     ` Thomas Gleixner
2017-07-04 21:15     ` Thomas Gleixner
2017-06-28 15:03 ` [PATCH v2 02/52] irqchip/gic-v3: Add redistributor iterator Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 03/52] irqchip/gic-v3: Add VLPI/DirectLPI discovery Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 04/52] irqchip/gic-v3-its: Move LPI definitions around Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 05/52] irqchip/gic-v3-its: Add probing for VLPI properties Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 06/52] irqchip/gic-v3-its: Macro-ize its_send_single_command Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 07/52] irqchip/gic-v3-its: Implement irq_set_irqchip_state for pending state Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 08/52] irqchip/gic-v3-its: Split out property table allocation Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 09/52] irqchip/gic-v3-its: Allow use of indirect VCPU tables Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 10/52] irqchip/gic-v3-its: Split out pending table allocation Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 11/52] irqchip/gic-v3-its: Rework LPI freeing Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 12/52] irqchip/gic-v3-its: Generalize device table allocation Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 13/52] irqchip/gic-v3-its: Generalize LPI configuration Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 14/52] irqchip/gic-v4: Add management structure definitions Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 15/52] irqchip/gic-v3-its: Add GICv4 ITS command definitions Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 16/52] irqchip/gic-v3-its: Add VLPI configuration hook Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 17/52] irqchip/gic-v3-its: Add VLPI map/unmap operations Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 18/52] irqchip/gic-v3-its: Add VLPI configuration handling Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 19/52] irqchip/gic-v3-its: Add VPE domain infrastructure Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 20/52] irqchip/gic-v3-its: Add VPE irq domain allocation/teardown Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` Marc Zyngier [this message]
2017-06-28 15:03   ` [PATCH v2 21/52] irqchip/gic-v3-its: Add VPE irq domain [de]activation Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 22/52] irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 23/52] irqchip/gic-v3-its: Add VPE scheduling Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 24/52] irqchip/gic-v3-its: Add VPE invalidation hook Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 25/52] irqchip/gic-v3-its: Add VPE affinity changes Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 26/52] irqchip/gic-v3-its: Add VPE interrupt masking Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 27/52] irqchip/gic-v3-its: Support VPE doorbell invalidation even when !DirectLPI Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 28/52] irqchip/gic-v3-its: Set implementation defined bit to enable VLPIs Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 29/52] irqchip/gic-v4: Add per-VM VPE domain creation Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 30/52] irqchip/gic-v4: Add VPE command interface Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 31/52] irqchip/gic-v4: Add VLPI configuration interface Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 32/52] irqchip/gic-v4: Add some basic documentation Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 33/52] irqchip/gic-v4: Enable low-level GICv4 operations Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 34/52] irqchip/gic-v3: Advertise GICv4 support to KVM Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 35/52] KVM: arm/arm64: vgic: Move kvm_vgic_destroy call around Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 36/52] KVM: arm/arm64: vITS: Add MSI translation helpers Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 37/52] KVM: arm/arm64: GICv4: Add init and teardown of the vPE irq domain Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 38/52] KVM: arm/arm64: GICv4: Wire init/teardown of per-VM support Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-07-08 11:26   ` Shanker Donthineni
2017-07-08 11:26     ` Shanker Donthineni
2017-07-08 11:26     ` Shanker Donthineni
2017-07-10 16:34     ` Marc Zyngier
2017-07-10 16:34       ` Marc Zyngier
2017-07-10 16:34       ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 39/52] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 40/52] KVM: arm/arm64: GICv4: Handle INT command applied to a VLPI Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:03   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 41/52] KVM: arm/arm64: GICv4: Unmap VLPI when freeing an LPI Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 42/52] KVM: arm/arm64: GICv4: Handle MOVI applied to a VLPI Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 43/52] KVM: arm/arm64: GICv4: Handle CLEAR " Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 44/52] KVM: arm/arm64: GICv4: Handle MOVALL applied to a vPE Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 45/52] KVM: arm/arm64: GICv4: Propagate property updates to VLPIs Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 46/52] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 47/52] KVM: arm/arm64: GICv4: Propagate VLPI properties at map time Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 48/52] KVM: arm/arm64: GICv4: Add doorbell interrupt handling Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 49/52] KVM: arm/arm64: GICv4: Hook vPE scheduling into vgic flush/sync Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 50/52] KVM: arm/arm64: GICv4: Enable virtual cpuif if VLPIs can be delivered Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 51/52] KVM: arm/arm64: GICv4: Use pending_last as a scheduling hint Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 52/52] KVM: arm/arm64: GICv4: Enable VLPI support Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-06-28 15:04   ` Marc Zyngier
2017-07-01 14:54 ` [PATCH v2 00/52] irqchip: KVM: Add support for GICv4 Shanker Donthineni
2017-07-01 14:54   ` Shanker Donthineni
2017-07-01 14:54   ` Shanker Donthineni

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