From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: "Florian Fainelli" <f.fainelli@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Brian Norris" <computersforpeace@gmail.com>,
"Gregory Fong" <gregory.0xf0@gmail.com>,
bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM
BCM7XXX ARM ARCHITECTURE), "Hauke Mehrtens" <hauke@hauke-m.de>,
"Rafał Miłecki" <zajec5@gmail.com>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Markus Mayer" <mmayer@broadcom.com>,
"Arnd Bergmann" <arnd@arndb.de>, "Eric Anholt" <eric@anholt.net>,
"Justin Chen" <justinpopo6@gmail.com>,
"Doug Berger" <opendmb@gmail.com>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
BCM7XXX ARM ARCHITECTURE),
linux-mips@linux-mips.org (open list:BROADCOM BCM47XX MIPS
ARCHITECTURE),
linux-pm@vger.kernerl.org,
"Rafael J. Wysocki" <rjw@rjwysocki.net>
Subject: [PATCH v3 1/4] dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
Date: Thu, 6 Jul 2017 15:22:22 -0700 [thread overview]
Message-ID: <20170706222225.9758-2-f.fainelli@gmail.com> (raw)
In-Reply-To: <20170706222225.9758-1-f.fainelli@gmail.com>
Update the Broadcom STB Power Management binding document with new
compatible strings for the DDR PHY and memory controller found on newer
chips.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 0d0c1ae81bed..790e6b0b8306 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY.
Required properties:
- compatible : should contain one of these
+ "brcm,brcmstb-ddr-phy-v71.1"
+ "brcm,brcmstb-ddr-phy-v72.0"
"brcm,brcmstb-ddr-phy-v225.1"
"brcm,brcmstb-ddr-phy-v240.1"
"brcm,brcmstb-ddr-phy-v240.2"
@@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh
Power-Down (SRPD), among other things.
Required properties:
-- compatible : should contain "brcm,brcmstb-memc-ddr"
+- compatible : should contain one of these
+ "brcm,brcmstb-memc-ddr-rev-b.2.2"
+ "brcm,brcmstb-memc-ddr"
- reg : the MEMC DDR register range
Example:
--
2.9.3
WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: "Florian Fainelli" <f.fainelli@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Brian Norris" <computersforpeace@gmail.com>,
"Gregory Fong" <gregory.0xf0@gmail.com>,
"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
<bcm-kernel-feedback-list@broadcom.com>,
"Hauke Mehrtens" <hauke@hauke-m.de>,
"Rafał Miłecki" <zajec5@gmail.com>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Markus Mayer" <mmayer@broadcom.com>,
"Arnd Bergmann" <arnd@arndb.de>, "Eric Anholt" <eric@anholt.net>,
"Justin Chen" <justinpopo6@gmail.com>,
"Doug Berger" <opendmb@gmail.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v3 1/4] dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
Date: Thu, 6 Jul 2017 15:22:22 -0700 [thread overview]
Message-ID: <20170706222225.9758-2-f.fainelli@gmail.com> (raw)
In-Reply-To: <20170706222225.9758-1-f.fainelli@gmail.com>
Update the Broadcom STB Power Management binding document with new
compatible strings for the DDR PHY and memory controller found on newer
chips.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 0d0c1ae81bed..790e6b0b8306 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY.
Required properties:
- compatible : should contain one of these
+ "brcm,brcmstb-ddr-phy-v71.1"
+ "brcm,brcmstb-ddr-phy-v72.0"
"brcm,brcmstb-ddr-phy-v225.1"
"brcm,brcmstb-ddr-phy-v240.1"
"brcm,brcmstb-ddr-phy-v240.2"
@@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh
Power-Down (SRPD), among other things.
Required properties:
-- compatible : should contain "brcm,brcmstb-memc-ddr"
+- compatible : should contain one of these
+ "brcm,brcmstb-memc-ddr-rev-b.2.2"
+ "brcm,brcmstb-memc-ddr"
- reg : the MEMC DDR register range
Example:
--
2.9.3
WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: "Florian Fainelli" <f.fainelli@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Brian Norris" <computersforpeace@gmail.com>,
"Gregory Fong" <gregory.0xf0@gmail.com>,
"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
<bcm-kernel-feedback-list@broadcom.com>,
"Hauke Mehrtens" <hauke@hauke-m.de>,
"Rafał Miłecki" <zajec5@gmail.com>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Markus Mayer" <mmayer@broadcom.com>,
"Arnd Bergmann" <arnd@arndb.de>, "Eric Anholt" <eric@anholt.net>,
"Justin Chen" <justinpopo6@gmail.com>,
"Doug Berger" <opendmb@gmail.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list:BROADCOM BCM47XX MIPS ARCHITECTURE"
<linux-mips@linux-mips.org>,
linux-pm@vger.kernerl.org,
"Rafael J. Wysocki" <rjw@rjwysocki.net>
Subject: [PATCH v3 1/4] dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
Date: Thu, 6 Jul 2017 15:22:22 -0700 [thread overview]
Message-ID: <20170706222225.9758-2-f.fainelli@gmail.com> (raw)
Message-ID: <20170706222222.kJ5u0qFaGDNGkSlHDvJu4IR5ExfpS6EO-diRi9L0Yu8@z> (raw)
In-Reply-To: <20170706222225.9758-1-f.fainelli@gmail.com>
Update the Broadcom STB Power Management binding document with new
compatible strings for the DDR PHY and memory controller found on newer
chips.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 0d0c1ae81bed..790e6b0b8306 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY.
Required properties:
- compatible : should contain one of these
+ "brcm,brcmstb-ddr-phy-v71.1"
+ "brcm,brcmstb-ddr-phy-v72.0"
"brcm,brcmstb-ddr-phy-v225.1"
"brcm,brcmstb-ddr-phy-v240.1"
"brcm,brcmstb-ddr-phy-v240.2"
@@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh
Power-Down (SRPD), among other things.
Required properties:
-- compatible : should contain "brcm,brcmstb-memc-ddr"
+- compatible : should contain one of these
+ "brcm,brcmstb-memc-ddr-rev-b.2.2"
+ "brcm,brcmstb-memc-ddr"
- reg : the MEMC DDR register range
Example:
--
2.9.3
WARNING: multiple messages have this Message-ID (diff)
From: f.fainelli@gmail.com (Florian Fainelli)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/4] dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
Date: Thu, 6 Jul 2017 15:22:22 -0700 [thread overview]
Message-ID: <20170706222225.9758-2-f.fainelli@gmail.com> (raw)
In-Reply-To: <20170706222225.9758-1-f.fainelli@gmail.com>
Update the Broadcom STB Power Management binding document with new
compatible strings for the DDR PHY and memory controller found on newer
chips.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 0d0c1ae81bed..790e6b0b8306 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY.
Required properties:
- compatible : should contain one of these
+ "brcm,brcmstb-ddr-phy-v71.1"
+ "brcm,brcmstb-ddr-phy-v72.0"
"brcm,brcmstb-ddr-phy-v225.1"
"brcm,brcmstb-ddr-phy-v240.1"
"brcm,brcmstb-ddr-phy-v240.2"
@@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh
Power-Down (SRPD), among other things.
Required properties:
-- compatible : should contain "brcm,brcmstb-memc-ddr"
+- compatible : should contain one of these
+ "brcm,brcmstb-memc-ddr-rev-b.2.2"
+ "brcm,brcmstb-memc-ddr"
- reg : the MEMC DDR register range
Example:
--
2.9.3
next prev parent reply other threads:[~2017-07-06 22:25 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-06 22:22 [PATCH v3 0/4] Broadcom STB S2/S3/S5 support for ARM and MIPS Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli [this message]
2017-07-06 22:22 ` [PATCH v3 1/4] dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` [PATCH v3 2/4] soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM) Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` [PATCH v3 3/4] dt-bindings: Document MIPS Broadcom STB power management nodes Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-10 14:13 ` Rob Herring
2017-07-10 14:13 ` Rob Herring
2017-07-10 14:13 ` Rob Herring
2017-07-06 22:22 ` [PATCH v3 4/4] soc bcm: brcmstb: Add support for S2/S3/S5 suspend states (MIPS) Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-06 22:22 ` Florian Fainelli
2017-07-18 19:52 ` [PATCH v3 0/4] Broadcom STB S2/S3/S5 support for ARM and MIPS Florian Fainelli
2017-07-18 19:52 ` Florian Fainelli
2017-07-18 19:52 ` Florian Fainelli
2017-07-28 23:59 ` Florian Fainelli
2017-07-28 23:59 ` Florian Fainelli
2017-07-28 23:59 ` Florian Fainelli
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