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From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
To: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	arnd-r2nGTMty4D4@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	Martin Blumenstingl
	<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Subject: [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines
Date: Sat, 22 Jul 2017 21:19:44 +0200	[thread overview]
Message-ID: <20170722191946.22938-6-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170722191946.22938-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

Export the soft reset lines for the CPU cores so they can be used in the
dt-bindings (required for SMP booting the CPU cores).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
---
 drivers/clk/meson/meson8b.h              | 8 ++++----
 include/dt-bindings/clock/meson8b-clkc.h | 7 ++++++-
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h
index 5f4d8e49dd4d..d6e35c1acc05 100644
--- a/drivers/clk/meson/meson8b.h
+++ b/drivers/clk/meson/meson8b.h
@@ -169,10 +169,10 @@
 #define RESETID_L2_CACHE_SOFT_RESET				0
 #define RESETID_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET		1
 #define RESETID_SCU_SOFT_RESET					2
-#define RESETID_CPU0_SOFT_RESET					3
-#define RESETID_CPU1_SOFT_RESET					4
-#define RESETID_CPU2_SOFT_RESET					5
-#define RESETID_CPU3_SOFT_RESET					6
+/* RESETID_CPU0_SOFT_RESET */
+/* RESETID_CPU1_SOFT_RESET */
+/* RESETID_CPU2_SOFT_RESET */
+/* RESETID_CPU3_SOFT_RESET */
 #define RESETID_A5_GLOBAL_RESET					7
 #define RESETID_A5_AXI_SOFT_RESET				8
 #define RESETID_A5_ABP_SOFT_RESET				9
diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h
index e29227fb52a1..76920cfd1f33 100644
--- a/include/dt-bindings/clock/meson8b-clkc.h
+++ b/include/dt-bindings/clock/meson8b-clkc.h
@@ -1,5 +1,5 @@
 /*
- * Meson8b clock tree IDs
+ * Meson8b clock and reset tree IDs
  */
 
 #ifndef __MESON8B_CLKC_H
@@ -32,4 +32,9 @@
 #define CLKID_USB0_DDR_BRIDGE	65
 #define CLKID_SANA		69
 
+#define RESETID_CPU0_SOFT_RESET					3
+#define RESETID_CPU1_SOFT_RESET					4
+#define RESETID_CPU2_SOFT_RESET					5
+#define RESETID_CPU3_SOFT_RESET					6
+
 #endif /* __MESON8B_CLKC_H */
-- 
2.13.3

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WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines
Date: Sat, 22 Jul 2017 21:19:44 +0200	[thread overview]
Message-ID: <20170722191946.22938-6-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170722191946.22938-1-martin.blumenstingl@googlemail.com>

Export the soft reset lines for the CPU cores so they can be used in the
dt-bindings (required for SMP booting the CPU cores).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/clk/meson/meson8b.h              | 8 ++++----
 include/dt-bindings/clock/meson8b-clkc.h | 7 ++++++-
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h
index 5f4d8e49dd4d..d6e35c1acc05 100644
--- a/drivers/clk/meson/meson8b.h
+++ b/drivers/clk/meson/meson8b.h
@@ -169,10 +169,10 @@
 #define RESETID_L2_CACHE_SOFT_RESET				0
 #define RESETID_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET		1
 #define RESETID_SCU_SOFT_RESET					2
-#define RESETID_CPU0_SOFT_RESET					3
-#define RESETID_CPU1_SOFT_RESET					4
-#define RESETID_CPU2_SOFT_RESET					5
-#define RESETID_CPU3_SOFT_RESET					6
+/* RESETID_CPU0_SOFT_RESET */
+/* RESETID_CPU1_SOFT_RESET */
+/* RESETID_CPU2_SOFT_RESET */
+/* RESETID_CPU3_SOFT_RESET */
 #define RESETID_A5_GLOBAL_RESET					7
 #define RESETID_A5_AXI_SOFT_RESET				8
 #define RESETID_A5_ABP_SOFT_RESET				9
diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h
index e29227fb52a1..76920cfd1f33 100644
--- a/include/dt-bindings/clock/meson8b-clkc.h
+++ b/include/dt-bindings/clock/meson8b-clkc.h
@@ -1,5 +1,5 @@
 /*
- * Meson8b clock tree IDs
+ * Meson8b clock and reset tree IDs
  */
 
 #ifndef __MESON8B_CLKC_H
@@ -32,4 +32,9 @@
 #define CLKID_USB0_DDR_BRIDGE	65
 #define CLKID_SANA		69
 
+#define RESETID_CPU0_SOFT_RESET					3
+#define RESETID_CPU1_SOFT_RESET					4
+#define RESETID_CPU2_SOFT_RESET					5
+#define RESETID_CPU3_SOFT_RESET					6
+
 #endif /* __MESON8B_CLKC_H */
-- 
2.13.3

WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines
Date: Sat, 22 Jul 2017 21:19:44 +0200	[thread overview]
Message-ID: <20170722191946.22938-6-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170722191946.22938-1-martin.blumenstingl@googlemail.com>

Export the soft reset lines for the CPU cores so they can be used in the
dt-bindings (required for SMP booting the CPU cores).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/clk/meson/meson8b.h              | 8 ++++----
 include/dt-bindings/clock/meson8b-clkc.h | 7 ++++++-
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h
index 5f4d8e49dd4d..d6e35c1acc05 100644
--- a/drivers/clk/meson/meson8b.h
+++ b/drivers/clk/meson/meson8b.h
@@ -169,10 +169,10 @@
 #define RESETID_L2_CACHE_SOFT_RESET				0
 #define RESETID_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET		1
 #define RESETID_SCU_SOFT_RESET					2
-#define RESETID_CPU0_SOFT_RESET					3
-#define RESETID_CPU1_SOFT_RESET					4
-#define RESETID_CPU2_SOFT_RESET					5
-#define RESETID_CPU3_SOFT_RESET					6
+/* RESETID_CPU0_SOFT_RESET */
+/* RESETID_CPU1_SOFT_RESET */
+/* RESETID_CPU2_SOFT_RESET */
+/* RESETID_CPU3_SOFT_RESET */
 #define RESETID_A5_GLOBAL_RESET					7
 #define RESETID_A5_AXI_SOFT_RESET				8
 #define RESETID_A5_ABP_SOFT_RESET				9
diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h
index e29227fb52a1..76920cfd1f33 100644
--- a/include/dt-bindings/clock/meson8b-clkc.h
+++ b/include/dt-bindings/clock/meson8b-clkc.h
@@ -1,5 +1,5 @@
 /*
- * Meson8b clock tree IDs
+ * Meson8b clock and reset tree IDs
  */
 
 #ifndef __MESON8B_CLKC_H
@@ -32,4 +32,9 @@
 #define CLKID_USB0_DDR_BRIDGE	65
 #define CLKID_SANA		69
 
+#define RESETID_CPU0_SOFT_RESET					3
+#define RESETID_CPU1_SOFT_RESET					4
+#define RESETID_CPU2_SOFT_RESET					5
+#define RESETID_CPU3_SOFT_RESET					6
+
 #endif /* __MESON8B_CLKC_H */
-- 
2.13.3

  parent reply	other threads:[~2017-07-22 19:19 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-22 19:19 [PATCH v4 0/7] SMP and CPU hotplug support for Meson8/Meson8b Martin Blumenstingl
2017-07-22 19:19 ` Martin Blumenstingl
2017-07-22 19:19 ` Martin Blumenstingl
     [not found] ` <20170722191946.22938-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-22 19:19   ` [PATCH v4 1/7] dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
     [not found]     ` <20170722191946.22938-2-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-25  7:59       ` Neil Armstrong
2017-07-25  7:59         ` Neil Armstrong
2017-07-25  7:59         ` Neil Armstrong
2017-07-22 19:19   ` [PATCH v4 2/7] ARM: smp_scu: add a helper for powering on a specific CPU Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19   ` [PATCH v4 3/7] ARM: smp_scu: allow the platform code to read the SCU CPU status Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19   ` [PATCH v4 4/7] ARM: meson: Add SMP bringup code for Meson8 and Meson8b Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
     [not found]     ` <20170722191946.22938-5-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-23 16:33       ` Florian Fainelli
2017-07-23 16:33         ` Florian Fainelli
2017-07-23 16:33         ` Florian Fainelli
2017-07-22 19:19   ` Martin Blumenstingl [this message]
2017-07-22 19:19     ` [PATCH v4 5/7] clk: meson: meson8b: export the CPU soft reset lines Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
     [not found]     ` <20170722191946.22938-6-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-25  8:00       ` Neil Armstrong
2017-07-25  8:00         ` Neil Armstrong
2017-07-25  8:00         ` Neil Armstrong
2017-07-22 19:19   ` [PATCH v4 6/7] ARM: dts: meson8: add support for booting the secondary CPU cores Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
     [not found]     ` <20170722191946.22938-7-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-25  8:00       ` Neil Armstrong
2017-07-25  8:00         ` Neil Armstrong
2017-07-25  8:00         ` Neil Armstrong
2017-07-22 19:19   ` [PATCH v4 7/7] ARM: dts: meson8b: " Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
2017-07-22 19:19     ` Martin Blumenstingl
     [not found]     ` <20170722191946.22938-8-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-25  8:01       ` Neil Armstrong
2017-07-25  8:01         ` Neil Armstrong
2017-07-25  8:01         ` Neil Armstrong

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