From: Chen-Yu Tsai <wens@csie.org> To: Maxime Ripard <maxime.ripard@free-electrons.com>, Ulf Hansson <ulf.hansson@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: Chen-Yu Tsai <wens@csie.org>, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH v3 03/10] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock Date: Mon, 24 Jul 2017 21:58:58 +0800 [thread overview] Message-ID: <20170724135905.28855-4-wens@csie.org> (raw) In-Reply-To: <20170724135905.28855-1-wens@csie.org> The MMC2 clock supports a new timing mode. When the new mode is active, the output clock rate is halved. This patch sets the feature flag for the new timing mode, and adds a pre-divider based on the mode bit. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c index 947f9f6e05d2..e43acebdfbcd 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c @@ -418,14 +418,8 @@ static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1-sample", "mmc1", static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1-output", "mmc1", 0x08c, 8, 3, 0); -/* TODO Support MMC2 clock's new timing mode. */ -static SUNXI_CCU_MP_WITH_MUX_GATE(mmc2_clk, "mmc2", mod0_default_parents, - 0x090, - 0, 4, /* M */ - 16, 2, /* P */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); +static SUNXI_CCU_MP_MMC_WITH_MUX_GATE(mmc2_clk, "mmc2", mod0_default_parents, + 0x090, 0); static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2-sample", "mmc2", 0x090, 20, 3, 0); -- 2.13.3
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 03/10] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock Date: Mon, 24 Jul 2017 21:58:58 +0800 [thread overview] Message-ID: <20170724135905.28855-4-wens@csie.org> (raw) In-Reply-To: <20170724135905.28855-1-wens@csie.org> The MMC2 clock supports a new timing mode. When the new mode is active, the output clock rate is halved. This patch sets the feature flag for the new timing mode, and adds a pre-divider based on the mode bit. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c index 947f9f6e05d2..e43acebdfbcd 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c @@ -418,14 +418,8 @@ static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1-sample", "mmc1", static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1-output", "mmc1", 0x08c, 8, 3, 0); -/* TODO Support MMC2 clock's new timing mode. */ -static SUNXI_CCU_MP_WITH_MUX_GATE(mmc2_clk, "mmc2", mod0_default_parents, - 0x090, - 0, 4, /* M */ - 16, 2, /* P */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); +static SUNXI_CCU_MP_MMC_WITH_MUX_GATE(mmc2_clk, "mmc2", mod0_default_parents, + 0x090, 0); static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2-sample", "mmc2", 0x090, 20, 3, 0); -- 2.13.3
next prev parent reply other threads:[~2017-07-24 13:59 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-07-24 13:58 [PATCH v3 00/10] ARM: sun8i: a83t: Add support for MMC controllers Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-24 13:58 ` [PATCH v3 01/10] clk: sunxi-ng: Add interface to query or configure MMC timing modes Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-25 7:32 ` Maxime Ripard 2017-07-25 7:32 ` Maxime Ripard 2017-07-24 13:58 ` [PATCH v3 02/10] clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-25 7:32 ` Maxime Ripard 2017-07-25 7:32 ` Maxime Ripard 2017-07-24 13:58 ` Chen-Yu Tsai [this message] 2017-07-24 13:58 ` [PATCH v3 03/10] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock Chen-Yu Tsai 2017-07-25 7:33 ` Maxime Ripard 2017-07-25 7:33 ` Maxime Ripard 2017-07-25 7:33 ` Maxime Ripard 2017-07-24 13:58 ` [PATCH v3 04/10] mmc: sunxi: Support controllers that can use both old and new timings Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-24 13:58 ` Chen-Yu Tsai 2017-07-24 13:59 ` [PATCH v3 05/10] mmc: sunxi: Support MMC DDR52 transfer mode with new timing mode Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` [PATCH v3 06/10] mmc: sunxi: Add support for A83T eMMC (MMC2) Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` [PATCH v3 07/10] ARM: dts: sun8i: a83t: Add MMC controller device nodes Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-25 7:33 ` Maxime Ripard 2017-07-25 7:33 ` Maxime Ripard 2017-07-25 7:33 ` Maxime Ripard 2017-07-24 13:59 ` [PATCH v3 08/10] ARM: dts: sun8i: a83t: Add pingroup for 8-bit eMMC on mmc2 Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-25 7:35 ` Maxime Ripard 2017-07-25 7:35 ` Maxime Ripard 2017-07-25 7:35 ` Maxime Ripard 2017-07-24 13:59 ` [PATCH v3 09/10] ARM: dts: sun8i: a83t: cubietruck-plus: Enable micro-SD card and eMMC Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-25 7:38 ` Maxime Ripard 2017-07-25 7:38 ` Maxime Ripard 2017-07-25 7:38 ` Maxime Ripard 2017-07-24 13:59 ` [PATCH v3 10/10] ARM: dts: sun8i: a83t: h8homlet: Enable micro-SD card and onboard eMMC Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-24 13:59 ` Chen-Yu Tsai 2017-07-25 7:39 ` Maxime Ripard 2017-07-25 7:39 ` Maxime Ripard 2017-07-26 14:09 ` [PATCH v3 00/10] ARM: sun8i: a83t: Add support for MMC controllers Chen-Yu Tsai 2017-07-26 14:09 ` Chen-Yu Tsai 2017-07-26 19:45 ` Maxime Ripard 2017-07-26 19:45 ` Maxime Ripard 2017-07-26 19:45 ` Maxime Ripard 2017-08-03 11:19 ` Ulf Hansson 2017-08-03 11:19 ` Ulf Hansson 2017-08-03 11:19 ` Ulf Hansson 2017-08-03 11:25 ` Chen-Yu Tsai 2017-08-03 11:25 ` Chen-Yu Tsai 2017-08-03 11:25 ` Chen-Yu Tsai 2017-08-03 12:02 ` Ulf Hansson 2017-08-03 12:02 ` Ulf Hansson 2017-08-03 12:02 ` Ulf Hansson 2017-08-04 2:16 ` Chen-Yu Tsai 2017-08-04 2:16 ` Chen-Yu Tsai
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170724135905.28855-4-wens@csie.org \ --to=wens@csie.org \ --cc=devicetree@vger.kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mmc@vger.kernel.org \ --cc=linux-sunxi@googlegroups.com \ --cc=mark.rutland@arm.com \ --cc=maxime.ripard@free-electrons.com \ --cc=mturquette@baylibre.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@codeaurora.org \ --cc=ulf.hansson@linaro.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.