From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
To: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org,
narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
Martin Blumenstingl
<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Subject: [PATCH v3 3/3] ARM: dts: meson: mark the clock controller also as reset controller
Date: Fri, 28 Jul 2017 23:13:13 +0200 [thread overview]
Message-ID: <20170728211313.10603-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170728211313.10603-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
The clock controller provides a few reset lines as well. Add the
corresponding CPU cores.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Reviewed-by: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
arch/arm/boot/dts/meson8.dtsi | 1 +
arch/arm/boot/dts/meson8b.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 6fe6a159e960..b98d44fde6b6 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -168,6 +168,7 @@
&cbus {
clkc: clock-controller@4000 {
#clock-cells = <1>;
+ #reset-cells = <1>;
compatible = "amlogic,meson8-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 8fce13844b0c..bc278da7df0d 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -119,6 +119,7 @@
&cbus {
clkc: clock-controller@4000 {
#clock-cells = <1>;
+ #reset-cells = <1>;
compatible = "amlogic,meson8b-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
--
2.13.3
--
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WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com,
carlo@caione.org, narmstrong@baylibre.com, jbrunet@baylibre.com,
linux-clk@vger.kernel.org, robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux@armlinux.org.uk,
mark.rutland@arm.com, mturquette@baylibre.com,
sboyd@codeaurora.org,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH v3 3/3] ARM: dts: meson: mark the clock controller also as reset controller
Date: Fri, 28 Jul 2017 23:13:13 +0200 [thread overview]
Message-ID: <20170728211313.10603-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170728211313.10603-1-martin.blumenstingl@googlemail.com>
The clock controller provides a few reset lines as well. Add the
corresponding CPU cores.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/boot/dts/meson8.dtsi | 1 +
arch/arm/boot/dts/meson8b.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 6fe6a159e960..b98d44fde6b6 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -168,6 +168,7 @@
&cbus {
clkc: clock-controller@4000 {
#clock-cells = <1>;
+ #reset-cells = <1>;
compatible = "amlogic,meson8-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 8fce13844b0c..bc278da7df0d 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -119,6 +119,7 @@
&cbus {
clkc: clock-controller@4000 {
#clock-cells = <1>;
+ #reset-cells = <1>;
compatible = "amlogic,meson8b-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
--
2.13.3
WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v3 3/3] ARM: dts: meson: mark the clock controller also as reset controller
Date: Fri, 28 Jul 2017 23:13:13 +0200 [thread overview]
Message-ID: <20170728211313.10603-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170728211313.10603-1-martin.blumenstingl@googlemail.com>
The clock controller provides a few reset lines as well. Add the
corresponding CPU cores.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/boot/dts/meson8.dtsi | 1 +
arch/arm/boot/dts/meson8b.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 6fe6a159e960..b98d44fde6b6 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -168,6 +168,7 @@
&cbus {
clkc: clock-controller at 4000 {
#clock-cells = <1>;
+ #reset-cells = <1>;
compatible = "amlogic,meson8-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 8fce13844b0c..bc278da7df0d 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -119,6 +119,7 @@
&cbus {
clkc: clock-controller at 4000 {
#clock-cells = <1>;
+ #reset-cells = <1>;
compatible = "amlogic,meson8b-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
--
2.13.3
next prev parent reply other threads:[~2017-07-28 21:13 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-28 21:13 [PATCH v3 0/3] add the reset controller to the Meson8b clkc Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl
[not found] ` <20170728211313.10603-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-07-28 21:13 ` [PATCH v3 1/3] dt-bindings: clock: meson8b: describe the embedded reset controller Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl
2017-08-03 23:08 ` Rob Herring
2017-08-03 23:08 ` Rob Herring
2017-07-28 21:13 ` [PATCH v3 2/3] clk: meson: meson8b: register the built-in " Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl [this message]
2017-07-28 21:13 ` [PATCH v3 3/3] ARM: dts: meson: mark the clock controller also as " Martin Blumenstingl
2017-07-28 21:13 ` Martin Blumenstingl
2017-07-31 8:27 ` [PATCH v3 0/3] add the reset controller to the Meson8b clkc Jerome Brunet
2017-07-31 8:27 ` Jerome Brunet
[not found] ` <1501489667.6834.1.camel-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-07-31 11:59 ` Neil Armstrong
2017-07-31 11:59 ` Neil Armstrong
2017-07-31 11:59 ` Neil Armstrong
[not found] ` <655f0326-df03-a810-9010-13148aee2db5-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-08-01 18:53 ` Martin Blumenstingl
2017-08-01 18:53 ` Martin Blumenstingl
2017-08-01 18:53 ` Martin Blumenstingl
2017-08-01 19:34 ` Kevin Hilman
2017-08-01 19:34 ` Kevin Hilman
2017-08-01 19:34 ` Kevin Hilman
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