From: Philipp Zabel <p.zabel@pengutronix.de> To: linux-kernel@vger.kernel.org Cc: Alexandru Gagniuc <alex.g@adaptrum.com>, Andre Przywara <andre.przywara@arm.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@st.com>, Maxime Ripard <maxime.ripard@free-electrons.com>, Chen-Yu Tsai <wens@csie.org>, Baoyou Xie <baoyou.xie@linaro.org>, Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>, Steffen Trumtrar <s.trumtrar@pengutronix.de>, Dinh Nguyen <dinguyen@kernel.org>, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, Philipp Zabel <p.zabel@pengutronix.de> Subject: [PATCH v2 3/5] reset: stm32: use the reset-simple driver Date: Fri, 11 Aug 2017 15:06:16 +0200 [thread overview] Message-ID: <20170811130618.3676-4-p.zabel@pengutronix.de> (raw) In-Reply-To: <20170811130618.3676-1-p.zabel@pengutronix.de> The reset-simple driver can be used without changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/reset/Kconfig | 11 ++--- drivers/reset/Makefile | 1 - drivers/reset/reset-simple.c | 1 + drivers/reset/reset-stm32.c | 108 ------------------------------------------- 4 files changed, 4 insertions(+), 117 deletions(-) delete mode 100644 drivers/reset/reset-stm32.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 78a8f6057985b..29f4487c290fc 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -70,19 +70,14 @@ config RESET_PISTACHIO config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_SOCFPGA || ARCH_SUNXI + default ARCH_SOCFPGA || ARCH_STM32 || ARCH_SUNXI help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, exclusive register space. - Currently this driver supports Altera SoCFPGAs and Allwinner SoCs. - -config RESET_STM32 - bool "STM32 Reset Driver" if COMPILE_TEST - default ARCH_STM32 - help - This enables the RCC reset controller driver for STM32 MCUs. + Currently this driver supports Altera SoCFPGAs, the RCC reset + controller in STM32 MCUs, and Allwinner SoCs. config RESET_SUNXI bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 25f5f722dec01..e8c3a032f4780 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_RESET_MESON) += reset-meson.o obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o -obj-$(CONFIG_RESET_STM32) += reset-stm32.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index e553d434ca362..8166aafc42478 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -104,6 +104,7 @@ static const struct reset_simple_devdata reset_simple_inverted = { static const struct of_device_id reset_simple_dt_ids[] = { { .compatible = "altr,rst-mgr", .data = &reset_simple_socfpga }, + { .compatible = "st,stm32-rcc", }, { .compatible = "allwinner,sun6i-a31-clock-reset", .data = &reset_simple_inverted }, { /* sentinel */ }, diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c deleted file mode 100644 index 3a7c8527e66af..0000000000000 --- a/drivers/reset/reset-stm32.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (C) Maxime Coquelin 2015 - * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com> - * License terms: GNU General Public License (GPL), version 2 - * - * Heavily based on sunxi driver from Maxime Ripard. - */ - -#include <linux/err.h> -#include <linux/io.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/platform_device.h> -#include <linux/reset-controller.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/types.h> - -struct stm32_reset_data { - spinlock_t lock; - void __iomem *membase; - struct reset_controller_dev rcdev; -}; - -static int stm32_reset_assert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct stm32_reset_data *data = container_of(rcdev, - struct stm32_reset_data, - rcdev); - int bank = id / BITS_PER_LONG; - int offset = id % BITS_PER_LONG; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&data->lock, flags); - - reg = readl(data->membase + (bank * 4)); - writel(reg | BIT(offset), data->membase + (bank * 4)); - - spin_unlock_irqrestore(&data->lock, flags); - - return 0; -} - -static int stm32_reset_deassert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct stm32_reset_data *data = container_of(rcdev, - struct stm32_reset_data, - rcdev); - int bank = id / BITS_PER_LONG; - int offset = id % BITS_PER_LONG; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&data->lock, flags); - - reg = readl(data->membase + (bank * 4)); - writel(reg & ~BIT(offset), data->membase + (bank * 4)); - - spin_unlock_irqrestore(&data->lock, flags); - - return 0; -} - -static const struct reset_control_ops stm32_reset_ops = { - .assert = stm32_reset_assert, - .deassert = stm32_reset_deassert, -}; - -static const struct of_device_id stm32_reset_dt_ids[] = { - { .compatible = "st,stm32-rcc", }, - { /* sentinel */ }, -}; - -static int stm32_reset_probe(struct platform_device *pdev) -{ - struct stm32_reset_data *data; - struct resource *res; - - data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - data->membase = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(data->membase)) - return PTR_ERR(data->membase); - - spin_lock_init(&data->lock); - - data->rcdev.owner = THIS_MODULE; - data->rcdev.nr_resets = resource_size(res) * 8; - data->rcdev.ops = &stm32_reset_ops; - data->rcdev.of_node = pdev->dev.of_node; - - return devm_reset_controller_register(&pdev->dev, &data->rcdev); -} - -static struct platform_driver stm32_reset_driver = { - .probe = stm32_reset_probe, - .driver = { - .name = "stm32-rcc-reset", - .of_match_table = stm32_reset_dt_ids, - }, -}; -builtin_platform_driver(stm32_reset_driver); -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: p.zabel@pengutronix.de (Philipp Zabel) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 3/5] reset: stm32: use the reset-simple driver Date: Fri, 11 Aug 2017 15:06:16 +0200 [thread overview] Message-ID: <20170811130618.3676-4-p.zabel@pengutronix.de> (raw) In-Reply-To: <20170811130618.3676-1-p.zabel@pengutronix.de> The reset-simple driver can be used without changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/reset/Kconfig | 11 ++--- drivers/reset/Makefile | 1 - drivers/reset/reset-simple.c | 1 + drivers/reset/reset-stm32.c | 108 ------------------------------------------- 4 files changed, 4 insertions(+), 117 deletions(-) delete mode 100644 drivers/reset/reset-stm32.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 78a8f6057985b..29f4487c290fc 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -70,19 +70,14 @@ config RESET_PISTACHIO config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_SOCFPGA || ARCH_SUNXI + default ARCH_SOCFPGA || ARCH_STM32 || ARCH_SUNXI help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, exclusive register space. - Currently this driver supports Altera SoCFPGAs and Allwinner SoCs. - -config RESET_STM32 - bool "STM32 Reset Driver" if COMPILE_TEST - default ARCH_STM32 - help - This enables the RCC reset controller driver for STM32 MCUs. + Currently this driver supports Altera SoCFPGAs, the RCC reset + controller in STM32 MCUs, and Allwinner SoCs. config RESET_SUNXI bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 25f5f722dec01..e8c3a032f4780 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_RESET_MESON) += reset-meson.o obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o -obj-$(CONFIG_RESET_STM32) += reset-stm32.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index e553d434ca362..8166aafc42478 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -104,6 +104,7 @@ static const struct reset_simple_devdata reset_simple_inverted = { static const struct of_device_id reset_simple_dt_ids[] = { { .compatible = "altr,rst-mgr", .data = &reset_simple_socfpga }, + { .compatible = "st,stm32-rcc", }, { .compatible = "allwinner,sun6i-a31-clock-reset", .data = &reset_simple_inverted }, { /* sentinel */ }, diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c deleted file mode 100644 index 3a7c8527e66af..0000000000000 --- a/drivers/reset/reset-stm32.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (C) Maxime Coquelin 2015 - * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com> - * License terms: GNU General Public License (GPL), version 2 - * - * Heavily based on sunxi driver from Maxime Ripard. - */ - -#include <linux/err.h> -#include <linux/io.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/platform_device.h> -#include <linux/reset-controller.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/types.h> - -struct stm32_reset_data { - spinlock_t lock; - void __iomem *membase; - struct reset_controller_dev rcdev; -}; - -static int stm32_reset_assert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct stm32_reset_data *data = container_of(rcdev, - struct stm32_reset_data, - rcdev); - int bank = id / BITS_PER_LONG; - int offset = id % BITS_PER_LONG; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&data->lock, flags); - - reg = readl(data->membase + (bank * 4)); - writel(reg | BIT(offset), data->membase + (bank * 4)); - - spin_unlock_irqrestore(&data->lock, flags); - - return 0; -} - -static int stm32_reset_deassert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct stm32_reset_data *data = container_of(rcdev, - struct stm32_reset_data, - rcdev); - int bank = id / BITS_PER_LONG; - int offset = id % BITS_PER_LONG; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&data->lock, flags); - - reg = readl(data->membase + (bank * 4)); - writel(reg & ~BIT(offset), data->membase + (bank * 4)); - - spin_unlock_irqrestore(&data->lock, flags); - - return 0; -} - -static const struct reset_control_ops stm32_reset_ops = { - .assert = stm32_reset_assert, - .deassert = stm32_reset_deassert, -}; - -static const struct of_device_id stm32_reset_dt_ids[] = { - { .compatible = "st,stm32-rcc", }, - { /* sentinel */ }, -}; - -static int stm32_reset_probe(struct platform_device *pdev) -{ - struct stm32_reset_data *data; - struct resource *res; - - data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - data->membase = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(data->membase)) - return PTR_ERR(data->membase); - - spin_lock_init(&data->lock); - - data->rcdev.owner = THIS_MODULE; - data->rcdev.nr_resets = resource_size(res) * 8; - data->rcdev.ops = &stm32_reset_ops; - data->rcdev.of_node = pdev->dev.of_node; - - return devm_reset_controller_register(&pdev->dev, &data->rcdev); -} - -static struct platform_driver stm32_reset_driver = { - .probe = stm32_reset_probe, - .driver = { - .name = "stm32-rcc-reset", - .of_match_table = stm32_reset_dt_ids, - }, -}; -builtin_platform_driver(stm32_reset_driver); -- 2.11.0
next prev parent reply other threads:[~2017-08-11 13:07 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-08-11 13:06 [PATCH v2 0/5] Unify simple reset drivers Philipp Zabel 2017-08-11 13:06 ` Philipp Zabel 2017-08-11 13:06 ` [PATCH v2 1/5] reset: add reset-simple to unify socfpga, stm32, sunxi, and zx2967 Philipp Zabel 2017-08-11 13:06 ` Philipp Zabel 2017-08-11 15:39 ` Dinh Nguyen 2017-08-11 15:39 ` Dinh Nguyen 2017-08-11 15:59 ` Philipp Zabel 2017-08-11 15:59 ` Philipp Zabel 2017-08-11 15:51 ` Chen-Yu Tsai 2017-08-11 15:51 ` Chen-Yu Tsai 2017-08-11 15:57 ` Philipp Zabel 2017-08-11 15:57 ` Philipp Zabel 2017-08-11 16:04 ` Alexandru Gagniuc 2017-08-11 16:04 ` Alexandru Gagniuc 2017-08-11 16:37 ` Philipp Zabel 2017-08-11 16:37 ` Philipp Zabel 2017-08-14 13:45 ` Eugeniy Paltsev 2017-08-14 13:45 ` Eugeniy Paltsev 2017-08-11 17:47 ` Alexandru Gagniuc 2017-08-11 17:47 ` Alexandru Gagniuc 2017-08-14 7:26 ` Philipp Zabel 2017-08-14 7:26 ` Philipp Zabel 2017-08-11 13:06 ` [PATCH v2 2/5] reset: socfpga: use the reset-simple driver Philipp Zabel 2017-08-11 13:06 ` Philipp Zabel 2017-08-11 16:28 ` Alexandru Gagniuc 2017-08-11 16:28 ` Alexandru Gagniuc 2017-08-11 16:50 ` Philipp Zabel 2017-08-11 16:50 ` Philipp Zabel 2017-08-11 13:06 ` Philipp Zabel [this message] 2017-08-11 13:06 ` [PATCH v2 3/5] reset: stm32: " Philipp Zabel 2017-08-11 13:06 ` [PATCH v2 4/5] reset: zx2967: " Philipp Zabel 2017-08-11 13:06 ` Philipp Zabel 2017-08-11 13:06 ` [PATCH v2 5/5] reset: simple: read back to make sure changes are applied Philipp Zabel 2017-08-11 13:06 ` Philipp Zabel
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170811130618.3676-4-p.zabel@pengutronix.de \ --to=p.zabel@pengutronix.de \ --cc=Eugeniy.Paltsev@synopsys.com \ --cc=alex.g@adaptrum.com \ --cc=alexandre.torgue@st.com \ --cc=andre.przywara@arm.com \ --cc=baoyou.xie@linaro.org \ --cc=dinguyen@kernel.org \ --cc=kernel@pengutronix.de \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=maxime.ripard@free-electrons.com \ --cc=mcoquelin.stm32@gmail.com \ --cc=s.trumtrar@pengutronix.de \ --cc=wens@csie.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.