From: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> To: ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org, john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, kishon-l0cyMroinI0@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> Subject: [PATCH v10 04/16] watchdog: lantiq: access boot cause register through regmap Date: Sun, 20 Aug 2017 00:18:11 +0200 [thread overview] Message-ID: <20170819221823.13850-5-hauke@hauke-m.de> (raw) In-Reply-To: <20170819221823.13850-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> This patch avoids accessing the function ltq_reset_cause() and directly accesses the register given over the syscon interface. The syscon interface will be implemented for the xway SoCs for the falcon SoCs the ltq_reset_cause() function never worked, because a wrong offset was used. Signed-off-by: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> Acked-by: Guenter Roeck <linux-cYGBoTPqujPR7s880joybQ@public.gmane.org> --- drivers/watchdog/lantiq_wdt.c | 74 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 69 insertions(+), 5 deletions(-) diff --git a/drivers/watchdog/lantiq_wdt.c b/drivers/watchdog/lantiq_wdt.c index e0823677d8c1..7f43cefa0eae 100644 --- a/drivers/watchdog/lantiq_wdt.c +++ b/drivers/watchdog/lantiq_wdt.c @@ -4,6 +4,7 @@ * by the Free Software Foundation. * * Copyright (C) 2010 John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> + * Copyright (C) 2017 Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> * Based on EP93xx wdt driver */ @@ -17,9 +18,20 @@ #include <linux/uaccess.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> #include <lantiq_soc.h> +#define LTQ_XRX_RCU_RST_STAT 0x0014 +#define LTQ_XRX_RCU_RST_STAT_WDT BIT(31) + +/* CPU0 Reset Source Register */ +#define LTQ_FALCON_SYS1_CPU0RS 0x0060 +/* reset cause mask */ +#define LTQ_FALCON_SYS1_CPU0RS_MASK 0x0007 +#define LTQ_FALCON_SYS1_CPU0RS_WDT 0x02 + /* * Section 3.4 of the datasheet * The password sequence protects the WDT control register from unintended @@ -186,16 +198,70 @@ static struct miscdevice ltq_wdt_miscdev = { .fops = <q_wdt_fops, }; +typedef int (*ltq_wdt_bootstatus_set)(struct platform_device *pdev); + +static int ltq_wdt_bootstatus_xrx(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *rcu_regmap; + u32 val; + int err; + + rcu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap"); + if (IS_ERR(rcu_regmap)) + return PTR_ERR(rcu_regmap); + + err = regmap_read(rcu_regmap, LTQ_XRX_RCU_RST_STAT, &val); + if (err) + return err; + + if (val & LTQ_XRX_RCU_RST_STAT_WDT) + ltq_wdt_bootstatus = WDIOF_CARDRESET; + + return 0; +} + +static int ltq_wdt_bootstatus_falcon(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *rcu_regmap; + u32 val; + int err; + + rcu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, + "lantiq,rcu"); + if (IS_ERR(rcu_regmap)) + return PTR_ERR(rcu_regmap); + + err = regmap_read(rcu_regmap, LTQ_FALCON_SYS1_CPU0RS, &val); + if (err) + return err; + + if ((val & LTQ_FALCON_SYS1_CPU0RS_MASK) == LTQ_FALCON_SYS1_CPU0RS_WDT) + ltq_wdt_bootstatus = WDIOF_CARDRESET; + + return 0; +} + static int ltq_wdt_probe(struct platform_device *pdev) { struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct clk *clk; + ltq_wdt_bootstatus_set ltq_wdt_bootstatus_set; + int ret; ltq_wdt_membase = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(ltq_wdt_membase)) return PTR_ERR(ltq_wdt_membase); + ltq_wdt_bootstatus_set = of_device_get_match_data(&pdev->dev); + if (ltq_wdt_bootstatus_set) { + ret = ltq_wdt_bootstatus_set(pdev); + if (ret) + return ret; + } + /* we do not need to enable the clock as it is always running */ clk = clk_get_io(); if (IS_ERR(clk)) { @@ -205,10 +271,6 @@ ltq_wdt_probe(struct platform_device *pdev) ltq_io_region_clk_rate = clk_get_rate(clk); clk_put(clk); - /* find out if the watchdog caused the last reboot */ - if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST) - ltq_wdt_bootstatus = WDIOF_CARDRESET; - dev_info(&pdev->dev, "Init done\n"); return misc_register(<q_wdt_miscdev); } @@ -222,7 +284,9 @@ ltq_wdt_remove(struct platform_device *pdev) } static const struct of_device_id ltq_wdt_match[] = { - { .compatible = "lantiq,wdt" }, + { .compatible = "lantiq,wdt", .data = NULL}, + { .compatible = "lantiq,xrx100-wdt", .data = ltq_wdt_bootstatus_xrx }, + { .compatible = "lantiq,falcon-wdt", .data = ltq_wdt_bootstatus_falcon }, {}, }; MODULE_DEVICE_TABLE(of, ltq_wdt_match); -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Hauke Mehrtens <hauke@hauke-m.de> To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, martin.blumenstingl@googlemail.com, john@phrozen.org, linux-spi@vger.kernel.org, hauke.mehrtens@intel.com, robh@kernel.org, andy.shevchenko@gmail.com, p.zabel@pengutronix.de, kishon@ti.com, mark.rutland@arm.com, Hauke Mehrtens <hauke@hauke-m.de> Subject: [PATCH v10 04/16] watchdog: lantiq: access boot cause register through regmap Date: Sun, 20 Aug 2017 00:18:11 +0200 [thread overview] Message-ID: <20170819221823.13850-5-hauke@hauke-m.de> (raw) In-Reply-To: <20170819221823.13850-1-hauke@hauke-m.de> This patch avoids accessing the function ltq_reset_cause() and directly accesses the register given over the syscon interface. The syscon interface will be implemented for the xway SoCs for the falcon SoCs the ltq_reset_cause() function never worked, because a wrong offset was used. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Guenter Roeck <linux@reck-us.net> --- drivers/watchdog/lantiq_wdt.c | 74 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 69 insertions(+), 5 deletions(-) diff --git a/drivers/watchdog/lantiq_wdt.c b/drivers/watchdog/lantiq_wdt.c index e0823677d8c1..7f43cefa0eae 100644 --- a/drivers/watchdog/lantiq_wdt.c +++ b/drivers/watchdog/lantiq_wdt.c @@ -4,6 +4,7 @@ * by the Free Software Foundation. * * Copyright (C) 2010 John Crispin <john@phrozen.org> + * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de> * Based on EP93xx wdt driver */ @@ -17,9 +18,20 @@ #include <linux/uaccess.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> #include <lantiq_soc.h> +#define LTQ_XRX_RCU_RST_STAT 0x0014 +#define LTQ_XRX_RCU_RST_STAT_WDT BIT(31) + +/* CPU0 Reset Source Register */ +#define LTQ_FALCON_SYS1_CPU0RS 0x0060 +/* reset cause mask */ +#define LTQ_FALCON_SYS1_CPU0RS_MASK 0x0007 +#define LTQ_FALCON_SYS1_CPU0RS_WDT 0x02 + /* * Section 3.4 of the datasheet * The password sequence protects the WDT control register from unintended @@ -186,16 +198,70 @@ static struct miscdevice ltq_wdt_miscdev = { .fops = <q_wdt_fops, }; +typedef int (*ltq_wdt_bootstatus_set)(struct platform_device *pdev); + +static int ltq_wdt_bootstatus_xrx(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *rcu_regmap; + u32 val; + int err; + + rcu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap"); + if (IS_ERR(rcu_regmap)) + return PTR_ERR(rcu_regmap); + + err = regmap_read(rcu_regmap, LTQ_XRX_RCU_RST_STAT, &val); + if (err) + return err; + + if (val & LTQ_XRX_RCU_RST_STAT_WDT) + ltq_wdt_bootstatus = WDIOF_CARDRESET; + + return 0; +} + +static int ltq_wdt_bootstatus_falcon(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *rcu_regmap; + u32 val; + int err; + + rcu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, + "lantiq,rcu"); + if (IS_ERR(rcu_regmap)) + return PTR_ERR(rcu_regmap); + + err = regmap_read(rcu_regmap, LTQ_FALCON_SYS1_CPU0RS, &val); + if (err) + return err; + + if ((val & LTQ_FALCON_SYS1_CPU0RS_MASK) == LTQ_FALCON_SYS1_CPU0RS_WDT) + ltq_wdt_bootstatus = WDIOF_CARDRESET; + + return 0; +} + static int ltq_wdt_probe(struct platform_device *pdev) { struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct clk *clk; + ltq_wdt_bootstatus_set ltq_wdt_bootstatus_set; + int ret; ltq_wdt_membase = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(ltq_wdt_membase)) return PTR_ERR(ltq_wdt_membase); + ltq_wdt_bootstatus_set = of_device_get_match_data(&pdev->dev); + if (ltq_wdt_bootstatus_set) { + ret = ltq_wdt_bootstatus_set(pdev); + if (ret) + return ret; + } + /* we do not need to enable the clock as it is always running */ clk = clk_get_io(); if (IS_ERR(clk)) { @@ -205,10 +271,6 @@ ltq_wdt_probe(struct platform_device *pdev) ltq_io_region_clk_rate = clk_get_rate(clk); clk_put(clk); - /* find out if the watchdog caused the last reboot */ - if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST) - ltq_wdt_bootstatus = WDIOF_CARDRESET; - dev_info(&pdev->dev, "Init done\n"); return misc_register(<q_wdt_miscdev); } @@ -222,7 +284,9 @@ ltq_wdt_remove(struct platform_device *pdev) } static const struct of_device_id ltq_wdt_match[] = { - { .compatible = "lantiq,wdt" }, + { .compatible = "lantiq,wdt", .data = NULL}, + { .compatible = "lantiq,xrx100-wdt", .data = ltq_wdt_bootstatus_xrx }, + { .compatible = "lantiq,falcon-wdt", .data = ltq_wdt_bootstatus_falcon }, {}, }; MODULE_DEVICE_TABLE(of, ltq_wdt_match); -- 2.11.0
next prev parent reply other threads:[~2017-08-19 22:18 UTC|newest] Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-08-19 22:18 [PATCH v10 00/16] MIPS: lantiq: handle RCU register by separate drivers Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-08-19 22:18 ` [PATCH v10 01/16] MIPS: lantiq: Use of_platform_default_populate instead of __dt_register_buses Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 02/16] mtd: lantiq-flash: drop check of boot select Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 03/16] spi: spi-falcon: " Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-4-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-08-28 11:23 ` Ralf Baechle 2017-08-28 11:23 ` Ralf Baechle [not found] ` <20170828112327.GA15640-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org> 2017-08-28 11:29 ` Hauke Mehrtens 2017-08-28 11:29 ` Hauke Mehrtens [not found] ` <40428f8d-f781-7952-30c6-41f65ec1096b-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-08-29 18:33 ` Mark Brown 2017-08-29 18:33 ` Mark Brown 2017-08-19 22:18 ` Hauke Mehrtens [this message] 2017-08-19 22:18 ` [PATCH v10 04/16] watchdog: lantiq: access boot cause register through regmap Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 05/16] watchdog: lantiq: add device tree binding documentation Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 06/16] MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-7-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-04 17:36 ` Martin Blumenstingl 2017-09-04 17:36 ` Martin Blumenstingl 2017-08-19 22:18 ` [PATCH v10 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-8-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-04 17:40 ` Martin Blumenstingl 2017-09-04 17:40 ` Martin Blumenstingl 2017-08-19 22:18 ` [PATCH v10 08/16] MIPS: lantiq: Convert the fpi bus driver to a platform_driver Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 09/16] MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 10/16] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-11-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-04 17:37 ` Martin Blumenstingl 2017-09-04 17:37 ` Martin Blumenstingl 2017-08-19 22:18 ` [PATCH v10 11/16] MIPS: lantiq: remove old reset controller implementation Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 12/16] MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-13-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-04 17:39 ` Martin Blumenstingl 2017-09-04 17:39 ` Martin Blumenstingl 2017-08-19 22:18 ` [PATCH v10 13/16] MIPS: lantiq: remove old GPHY loader code Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 14/16] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 15/16] MIPS: lantiq: remove old USB PHY initialisation Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens 2017-08-19 22:18 ` [PATCH v10 16/16] MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation Hauke Mehrtens 2017-08-19 22:18 ` Hauke Mehrtens [not found] ` <20170819221823.13850-17-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> 2017-09-04 17:40 ` Martin Blumenstingl 2017-09-04 17:40 ` Martin Blumenstingl
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