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From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
To: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	arnd-r2nGTMty4D4@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	Martin Blumenstingl
	<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Subject: [PATCH v7 3/6] ARM: smp_scu: allow the platform code to read the SCU CPU status
Date: Sun, 17 Sep 2017 18:45:20 +0200	[thread overview]
Message-ID: <20170917164523.6970-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170917164523.6970-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

On Amlogic Meson8 / Meson8m2 (both Cortex-A9) and Meson8b (Cortex-A5)
the CPU hotplug code needs to wait until the SCU status of the CPU that
is being taken offline is SCU_PM_POWEROFF.
Provide a utility function (which can be invoked for example from
.cpu_kill()) which allows reading the SCU status of a CPU.

While here, replace the magic number 0x3 with a preprocessor macro
(SCU_CPU_STATUS_MASK) so we don't have to duplicate this magic number in
the new function.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
---
 arch/arm/include/asm/smp_scu.h |  6 ++++++
 arch/arm/kernel/smp_scu.c      | 18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 4c47bdfd4f61..1529d1ae2f8d 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -28,6 +28,7 @@ static inline unsigned long scu_a9_get_base(void)
 unsigned int scu_get_core_count(void __iomem *);
 int scu_power_mode(void __iomem *, unsigned int);
 int scu_cpu_power_enable(void __iomem *, unsigned int);
+int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu);
 #else
 static inline unsigned int scu_get_core_count(void __iomem *scu_base)
 {
@@ -42,6 +43,11 @@ static inline int scu_cpu_power_enable(void __iomem *scu_base,
 {
 	return -EINVAL;
 }
+static inline int scu_get_cpu_power_mode(void __iomem *scu_base,
+					 unsigned int logical_cpu)
+{
+	return -EINVAL;
+}
 #endif
 
 #if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index 1d549c16b5fc..c6b33074c393 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -21,6 +21,7 @@
 #define SCU_STANDBY_ENABLE	(1 << 5)
 #define SCU_CONFIG		0x04
 #define SCU_CPU_STATUS		0x08
+#define SCU_CPU_STATUS_MASK	GENMASK(1, 0)
 #define SCU_INVALIDATE		0x0c
 #define SCU_FPGA_REVISION	0x10
 
@@ -82,7 +83,8 @@ static int scu_set_power_mode_internal(void __iomem *scu_base,
 	if (mode > 3 || mode == 1 || cpu > 3)
 		return -EINVAL;
 
-	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu) & ~0x03;
+	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu);
+	val &= ~SCU_CPU_STATUS_MASK;
 	val |= mode;
 	writeb_relaxed(val, scu_base + SCU_CPU_STATUS + cpu);
 
@@ -109,3 +111,17 @@ int scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu)
 {
 	return scu_set_power_mode_internal(scu_base, cpu, SCU_PM_NORMAL);
 }
+
+int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu)
+{
+	unsigned int val;
+	int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu), 0);
+
+	if (cpu > 3)
+		return -EINVAL;
+
+	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu);
+	val &= SCU_CPU_STATUS_MASK;
+
+	return val;
+}
-- 
2.14.1

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WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 3/6] ARM: smp_scu: allow the platform code to read the SCU CPU status
Date: Sun, 17 Sep 2017 18:45:20 +0200	[thread overview]
Message-ID: <20170917164523.6970-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170917164523.6970-1-martin.blumenstingl@googlemail.com>

On Amlogic Meson8 / Meson8m2 (both Cortex-A9) and Meson8b (Cortex-A5)
the CPU hotplug code needs to wait until the SCU status of the CPU that
is being taken offline is SCU_PM_POWEROFF.
Provide a utility function (which can be invoked for example from
.cpu_kill()) which allows reading the SCU status of a CPU.

While here, replace the magic number 0x3 with a preprocessor macro
(SCU_CPU_STATUS_MASK) so we don't have to duplicate this magic number in
the new function.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/include/asm/smp_scu.h |  6 ++++++
 arch/arm/kernel/smp_scu.c      | 18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 4c47bdfd4f61..1529d1ae2f8d 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -28,6 +28,7 @@ static inline unsigned long scu_a9_get_base(void)
 unsigned int scu_get_core_count(void __iomem *);
 int scu_power_mode(void __iomem *, unsigned int);
 int scu_cpu_power_enable(void __iomem *, unsigned int);
+int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu);
 #else
 static inline unsigned int scu_get_core_count(void __iomem *scu_base)
 {
@@ -42,6 +43,11 @@ static inline int scu_cpu_power_enable(void __iomem *scu_base,
 {
 	return -EINVAL;
 }
+static inline int scu_get_cpu_power_mode(void __iomem *scu_base,
+					 unsigned int logical_cpu)
+{
+	return -EINVAL;
+}
 #endif
 
 #if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index 1d549c16b5fc..c6b33074c393 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -21,6 +21,7 @@
 #define SCU_STANDBY_ENABLE	(1 << 5)
 #define SCU_CONFIG		0x04
 #define SCU_CPU_STATUS		0x08
+#define SCU_CPU_STATUS_MASK	GENMASK(1, 0)
 #define SCU_INVALIDATE		0x0c
 #define SCU_FPGA_REVISION	0x10
 
@@ -82,7 +83,8 @@ static int scu_set_power_mode_internal(void __iomem *scu_base,
 	if (mode > 3 || mode == 1 || cpu > 3)
 		return -EINVAL;
 
-	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu) & ~0x03;
+	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu);
+	val &= ~SCU_CPU_STATUS_MASK;
 	val |= mode;
 	writeb_relaxed(val, scu_base + SCU_CPU_STATUS + cpu);
 
@@ -109,3 +111,17 @@ int scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu)
 {
 	return scu_set_power_mode_internal(scu_base, cpu, SCU_PM_NORMAL);
 }
+
+int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu)
+{
+	unsigned int val;
+	int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu), 0);
+
+	if (cpu > 3)
+		return -EINVAL;
+
+	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu);
+	val &= SCU_CPU_STATUS_MASK;
+
+	return val;
+}
-- 
2.14.1

WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v7 3/6] ARM: smp_scu: allow the platform code to read the SCU CPU status
Date: Sun, 17 Sep 2017 18:45:20 +0200	[thread overview]
Message-ID: <20170917164523.6970-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170917164523.6970-1-martin.blumenstingl@googlemail.com>

On Amlogic Meson8 / Meson8m2 (both Cortex-A9) and Meson8b (Cortex-A5)
the CPU hotplug code needs to wait until the SCU status of the CPU that
is being taken offline is SCU_PM_POWEROFF.
Provide a utility function (which can be invoked for example from
.cpu_kill()) which allows reading the SCU status of a CPU.

While here, replace the magic number 0x3 with a preprocessor macro
(SCU_CPU_STATUS_MASK) so we don't have to duplicate this magic number in
the new function.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/include/asm/smp_scu.h |  6 ++++++
 arch/arm/kernel/smp_scu.c      | 18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 4c47bdfd4f61..1529d1ae2f8d 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -28,6 +28,7 @@ static inline unsigned long scu_a9_get_base(void)
 unsigned int scu_get_core_count(void __iomem *);
 int scu_power_mode(void __iomem *, unsigned int);
 int scu_cpu_power_enable(void __iomem *, unsigned int);
+int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu);
 #else
 static inline unsigned int scu_get_core_count(void __iomem *scu_base)
 {
@@ -42,6 +43,11 @@ static inline int scu_cpu_power_enable(void __iomem *scu_base,
 {
 	return -EINVAL;
 }
+static inline int scu_get_cpu_power_mode(void __iomem *scu_base,
+					 unsigned int logical_cpu)
+{
+	return -EINVAL;
+}
 #endif
 
 #if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index 1d549c16b5fc..c6b33074c393 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -21,6 +21,7 @@
 #define SCU_STANDBY_ENABLE	(1 << 5)
 #define SCU_CONFIG		0x04
 #define SCU_CPU_STATUS		0x08
+#define SCU_CPU_STATUS_MASK	GENMASK(1, 0)
 #define SCU_INVALIDATE		0x0c
 #define SCU_FPGA_REVISION	0x10
 
@@ -82,7 +83,8 @@ static int scu_set_power_mode_internal(void __iomem *scu_base,
 	if (mode > 3 || mode == 1 || cpu > 3)
 		return -EINVAL;
 
-	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu) & ~0x03;
+	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu);
+	val &= ~SCU_CPU_STATUS_MASK;
 	val |= mode;
 	writeb_relaxed(val, scu_base + SCU_CPU_STATUS + cpu);
 
@@ -109,3 +111,17 @@ int scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu)
 {
 	return scu_set_power_mode_internal(scu_base, cpu, SCU_PM_NORMAL);
 }
+
+int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu)
+{
+	unsigned int val;
+	int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu), 0);
+
+	if (cpu > 3)
+		return -EINVAL;
+
+	val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu);
+	val &= SCU_CPU_STATUS_MASK;
+
+	return val;
+}
-- 
2.14.1

  parent reply	other threads:[~2017-09-17 16:45 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-17 16:45 [PATCH v7 0/6] SMP and CPU hotplug support for Meson8/Meson8b Martin Blumenstingl
2017-09-17 16:45 ` Martin Blumenstingl
2017-09-17 16:45 ` Martin Blumenstingl
     [not found] ` <20170917164523.6970-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-09-17 16:45   ` [PATCH v7 1/6] dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45   ` [PATCH v7 2/6] ARM: smp_scu: add a helper for powering on a specific CPU Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
     [not found]     ` <20170917164523.6970-3-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-10-23  9:51       ` Russell King - ARM Linux
2017-10-23  9:51         ` Russell King - ARM Linux
2017-10-23  9:51         ` Russell King - ARM Linux
2017-09-17 16:45   ` Martin Blumenstingl [this message]
2017-09-17 16:45     ` [PATCH v7 3/6] ARM: smp_scu: allow the platform code to read the SCU CPU status Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
     [not found]     ` <20170917164523.6970-4-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-10-23  9:54       ` Russell King - ARM Linux
2017-10-23  9:54         ` Russell King - ARM Linux
2017-10-23  9:54         ` Russell King - ARM Linux
2017-09-17 16:45   ` [PATCH v7 4/6] ARM: meson: Add SMP bringup code for Meson8 and Meson8b Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
     [not found]     ` <20170917164523.6970-5-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-10-28 21:08       ` Linus Lüssing
2017-10-28 21:08         ` Linus Lüssing
2017-10-28 21:08         ` Linus Lüssing
2017-09-17 16:45   ` [PATCH v7 5/6] ARM: dts: meson8: add support for booting the secondary CPU cores Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45   ` [PATCH v7 6/6] ARM: dts: meson8b: " Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-17 16:45     ` Martin Blumenstingl
2017-09-29 11:29     ` Linus Lüssing
2017-09-29 11:29       ` Linus Lüssing
2017-09-29 11:29       ` Linus Lüssing
2017-10-01 12:19   ` [PATCH v7 0/6] SMP and CPU hotplug support for Meson8/Meson8b Martin Blumenstingl
2017-10-01 12:19     ` Martin Blumenstingl
2017-10-01 12:19     ` Martin Blumenstingl
     [not found]     ` <CAFBinCCdj8LwXvUSoCPeVfPUTaLVFFyvKZcNceLGvj26Z740DQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-06 21:30       ` Kevin Hilman
2017-10-06 21:30         ` Kevin Hilman
2017-10-06 21:30         ` Kevin Hilman
     [not found]         ` <7hpoa07yn6.fsf-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-10-20 22:14           ` Martin Blumenstingl
2017-10-20 22:14             ` Martin Blumenstingl
2017-10-20 22:14             ` Martin Blumenstingl
     [not found]             ` <CAFBinCB0YkApefxJCVDmEc0cD3JWv7+ZHE3PY2BjD3tXD6gbEQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-23  9:49               ` Russell King - ARM Linux
2017-10-23  9:49                 ` Russell King - ARM Linux
2017-10-23  9:49                 ` Russell King - ARM Linux
     [not found]                 ` <20171023094921.GO20805-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
2017-10-25 21:05                   ` Martin Blumenstingl
2017-10-25 21:05                     ` Martin Blumenstingl
2017-10-25 21:05                     ` Martin Blumenstingl
2017-10-29 15:31   ` Kevin Hilman
2017-10-29 15:31     ` Kevin Hilman
2017-10-29 15:31     ` Kevin Hilman

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