From: Icenowy Zheng <icenowy@aosc.io> To: Maxime Ripard <maxime.ripard@free-electrons.com>, Chen-Yu Tsai <wens@csie.org> Cc: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng <icenowy@aosc.io> Subject: [PATCH 2/2] clk: sunxi-ng: r40: export a regmap to access the GMAC register Date: Fri, 6 Oct 2017 14:33:33 +0800 [thread overview] Message-ID: <20171006063333.12345-3-icenowy@aosc.io> (raw) In-Reply-To: <20171006063333.12345-1-icenowy@aosc.io> There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in the syscon part, in the CCU of R40 SoC. Export a regmap of the CCU. Read access is not restricted to all registers, but only the GMAC register is allowed to be written. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c index bb94e2c44e86..df752bf77ff1 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c @@ -14,6 +14,7 @@ #include <linux/clk-provider.h> #include <linux/platform_device.h> #include <linux/of_address.h> +#include <linux/regmap.h> #include "ccu_common.h" #include "ccu_reset.h" @@ -1251,9 +1252,35 @@ static struct ccu_mux_nb sun8i_r40_cpu_nb = { .bypass_index = 1, /* index of 24 MHz oscillator */ }; +/* + * Add a regmap for the GMAC driver (dwmac-sun8i) to access the + * GMAC configuration register. + * Only this register is allowed to be written, in order to + * prevent overriding critical clock configuration. + */ + +#define SUN8I_R40_GMAC_CFG_REG 0x164 +static bool sun8i_r40_ccu_regmap_writeable_reg(struct device *dev, + unsigned int reg) +{ + if (reg == SUN8I_R40_GMAC_CFG_REG) + return true; + return false; +} + +static struct regmap_config sun8i_r40_ccu_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x320, /* PLL_LOCK_CTRL_REG */ + + .writeable_reg = sun8i_r40_ccu_regmap_writeable_reg, +}; + static int sun8i_r40_ccu_probe(struct platform_device *pdev) { struct resource *res; + struct regmap *regmap; void __iomem *reg; u32 val; int ret; @@ -1278,6 +1305,11 @@ static int sun8i_r40_ccu_probe(struct platform_device *pdev) val &= ~GENMASK(25, 20); writel(val, reg + SUN8I_R40_USB_CLK_REG); + regmap = devm_regmap_init_mmio(&pdev->dev, reg, + &sun8i_r40_ccu_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + ret = sunxi_ccu_probe(pdev->dev.of_node, reg, &sun8i_r40_ccu_desc); if (ret) return ret; -- 2.13.6
WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.io (Icenowy Zheng) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] clk: sunxi-ng: r40: export a regmap to access the GMAC register Date: Fri, 6 Oct 2017 14:33:33 +0800 [thread overview] Message-ID: <20171006063333.12345-3-icenowy@aosc.io> (raw) In-Reply-To: <20171006063333.12345-1-icenowy@aosc.io> There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in the syscon part, in the CCU of R40 SoC. Export a regmap of the CCU. Read access is not restricted to all registers, but only the GMAC register is allowed to be written. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c index bb94e2c44e86..df752bf77ff1 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c @@ -14,6 +14,7 @@ #include <linux/clk-provider.h> #include <linux/platform_device.h> #include <linux/of_address.h> +#include <linux/regmap.h> #include "ccu_common.h" #include "ccu_reset.h" @@ -1251,9 +1252,35 @@ static struct ccu_mux_nb sun8i_r40_cpu_nb = { .bypass_index = 1, /* index of 24 MHz oscillator */ }; +/* + * Add a regmap for the GMAC driver (dwmac-sun8i) to access the + * GMAC configuration register. + * Only this register is allowed to be written, in order to + * prevent overriding critical clock configuration. + */ + +#define SUN8I_R40_GMAC_CFG_REG 0x164 +static bool sun8i_r40_ccu_regmap_writeable_reg(struct device *dev, + unsigned int reg) +{ + if (reg == SUN8I_R40_GMAC_CFG_REG) + return true; + return false; +} + +static struct regmap_config sun8i_r40_ccu_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x320, /* PLL_LOCK_CTRL_REG */ + + .writeable_reg = sun8i_r40_ccu_regmap_writeable_reg, +}; + static int sun8i_r40_ccu_probe(struct platform_device *pdev) { struct resource *res; + struct regmap *regmap; void __iomem *reg; u32 val; int ret; @@ -1278,6 +1305,11 @@ static int sun8i_r40_ccu_probe(struct platform_device *pdev) val &= ~GENMASK(25, 20); writel(val, reg + SUN8I_R40_USB_CLK_REG); + regmap = devm_regmap_init_mmio(&pdev->dev, reg, + &sun8i_r40_ccu_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + ret = sunxi_ccu_probe(pdev->dev.of_node, reg, &sun8i_r40_ccu_desc); if (ret) return ret; -- 2.13.6
next prev parent reply other threads:[~2017-10-06 6:34 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-06 6:33 [PATCH 0/2] Add a regmap to Allwinner R40 CCU to export GMAC register Icenowy Zheng 2017-10-06 6:33 ` Icenowy Zheng 2017-10-06 6:33 ` [PATCH 1/2] clk: sunxi-ng: r40: rewrite init code to a platform driver Icenowy Zheng 2017-10-06 6:33 ` Icenowy Zheng 2017-10-06 6:33 ` Icenowy Zheng [this message] 2017-10-06 6:33 ` [PATCH 2/2] clk: sunxi-ng: r40: export a regmap to access the GMAC register Icenowy Zheng 2017-10-09 7:18 ` [PATCH 0/2] Add a regmap to Allwinner R40 CCU to export " Maxime Ripard 2017-10-09 7:18 ` Maxime Ripard 2017-10-09 7:22 ` Icenowy Zheng 2017-10-09 7:22 ` Icenowy Zheng 2017-11-02 7:11 ` Stephen Boyd 2017-11-02 7:11 ` Stephen Boyd 2017-11-02 7:49 ` Icenowy Zheng 2017-11-02 7:49 ` Icenowy Zheng
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20171006063333.12345-3-icenowy@aosc.io \ --to=icenowy@aosc.io \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-sunxi@googlegroups.com \ --cc=maxime.ripard@free-electrons.com \ --cc=wens@csie.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.