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From: Christoffer Dall <christoffer.dall@linaro.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>
Cc: kvm@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Subject: [PULL 22/26] KVM: arm/arm64: vgic-its: Free caches when GITS_BASER Valid bit is cleared
Date: Tue,  7 Nov 2017 11:47:55 +0100	[thread overview]
Message-ID: <20171107104800.30021-23-christoffer.dall@linaro.org> (raw)
In-Reply-To: <20171107104800.30021-1-christoffer.dall@linaro.org>

From: Eric Auger <eric.auger@redhat.com>

When the GITS_BASER<n>.Valid gets cleared, the data structures in
guest RAM are not valid anymore. The device, collection
and LPI lists stored in the in-kernel ITS represent the same
information in some form of cache. So let's void the cache.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
---
 virt/kvm/arm/vgic/vgic-its.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
index d46256c07ba5..1732e08a4375 100644
--- a/virt/kvm/arm/vgic/vgic-its.c
+++ b/virt/kvm/arm/vgic/vgic-its.c
@@ -1431,7 +1431,7 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm,
 				      unsigned long val)
 {
 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
-	u64 entry_size, device_type;
+	u64 entry_size, table_type;
 	u64 reg, *regptr, clearbits = 0;
 
 	/* When GITS_CTLR.Enable is 1, we ignore write accesses. */
@@ -1442,12 +1442,12 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm,
 	case 0:
 		regptr = &its->baser_device_table;
 		entry_size = abi->dte_esz;
-		device_type = GITS_BASER_TYPE_DEVICE;
+		table_type = GITS_BASER_TYPE_DEVICE;
 		break;
 	case 1:
 		regptr = &its->baser_coll_table;
 		entry_size = abi->cte_esz;
-		device_type = GITS_BASER_TYPE_COLLECTION;
+		table_type = GITS_BASER_TYPE_COLLECTION;
 		clearbits = GITS_BASER_INDIRECT;
 		break;
 	default:
@@ -1459,10 +1459,24 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm,
 	reg &= ~clearbits;
 
 	reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
-	reg |= device_type << GITS_BASER_TYPE_SHIFT;
+	reg |= table_type << GITS_BASER_TYPE_SHIFT;
 	reg = vgic_sanitise_its_baser(reg);
 
 	*regptr = reg;
+
+	if (!(reg & GITS_BASER_VALID)) {
+		/* Take the its_lock to prevent a race with a save/restore */
+		mutex_lock(&its->its_lock);
+		switch (table_type) {
+		case GITS_BASER_TYPE_DEVICE:
+			vgic_its_free_device_list(kvm, its);
+			break;
+		case GITS_BASER_TYPE_COLLECTION:
+			vgic_its_free_collection_list(kvm, its);
+			break;
+		}
+		mutex_unlock(&its->its_lock);
+	}
 }
 
 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
-- 
2.14.2

WARNING: multiple messages have this Message-ID (diff)
From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PULL 22/26] KVM: arm/arm64: vgic-its: Free caches when GITS_BASER Valid bit is cleared
Date: Tue,  7 Nov 2017 11:47:55 +0100	[thread overview]
Message-ID: <20171107104800.30021-23-christoffer.dall@linaro.org> (raw)
In-Reply-To: <20171107104800.30021-1-christoffer.dall@linaro.org>

From: Eric Auger <eric.auger@redhat.com>

When the GITS_BASER<n>.Valid gets cleared, the data structures in
guest RAM are not valid anymore. The device, collection
and LPI lists stored in the in-kernel ITS represent the same
information in some form of cache. So let's void the cache.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
---
 virt/kvm/arm/vgic/vgic-its.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
index d46256c07ba5..1732e08a4375 100644
--- a/virt/kvm/arm/vgic/vgic-its.c
+++ b/virt/kvm/arm/vgic/vgic-its.c
@@ -1431,7 +1431,7 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm,
 				      unsigned long val)
 {
 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
-	u64 entry_size, device_type;
+	u64 entry_size, table_type;
 	u64 reg, *regptr, clearbits = 0;
 
 	/* When GITS_CTLR.Enable is 1, we ignore write accesses. */
@@ -1442,12 +1442,12 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm,
 	case 0:
 		regptr = &its->baser_device_table;
 		entry_size = abi->dte_esz;
-		device_type = GITS_BASER_TYPE_DEVICE;
+		table_type = GITS_BASER_TYPE_DEVICE;
 		break;
 	case 1:
 		regptr = &its->baser_coll_table;
 		entry_size = abi->cte_esz;
-		device_type = GITS_BASER_TYPE_COLLECTION;
+		table_type = GITS_BASER_TYPE_COLLECTION;
 		clearbits = GITS_BASER_INDIRECT;
 		break;
 	default:
@@ -1459,10 +1459,24 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm,
 	reg &= ~clearbits;
 
 	reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
-	reg |= device_type << GITS_BASER_TYPE_SHIFT;
+	reg |= table_type << GITS_BASER_TYPE_SHIFT;
 	reg = vgic_sanitise_its_baser(reg);
 
 	*regptr = reg;
+
+	if (!(reg & GITS_BASER_VALID)) {
+		/* Take the its_lock to prevent a race with a save/restore */
+		mutex_lock(&its->its_lock);
+		switch (table_type) {
+		case GITS_BASER_TYPE_DEVICE:
+			vgic_its_free_device_list(kvm, its);
+			break;
+		case GITS_BASER_TYPE_COLLECTION:
+			vgic_its_free_collection_list(kvm, its);
+			break;
+		}
+		mutex_unlock(&its->its_lock);
+	}
 }
 
 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
-- 
2.14.2

  parent reply	other threads:[~2017-11-07 10:47 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-07 10:47 [PULL 00/26] KVM/ARM Changes for v4.15 Christoffer Dall
2017-11-07 10:47 ` Christoffer Dall
2017-11-07 10:47 ` [PULL 01/26] arm64: Implement arch_counter_get_cntpct to read the physical counter Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 02/26] arm64: Use physical counter for in-kernel reads when booted in EL2 Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 03/26] KVM: arm/arm64: Guard kvm_vgic_map_is_active against !vgic_initialized Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 04/26] KVM: arm/arm64: Support calling vgic_update_irq_pending from irq context Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 05/26] KVM: arm/arm64: Check that system supports split eoi/deactivate Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 06/26] KVM: arm/arm64: Make timer_arm and timer_disarm helpers more generic Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 07/26] KVM: arm/arm64: Rename soft timer to bg_timer Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 08/26] KVM: arm/arm64: Move timer/vgic flush/sync under disabled irq Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 09/26] KVM: arm/arm64: Use separate timer for phys timer emulation Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 10/26] KVM: arm/arm64: Move timer save/restore out of the hyp code Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 11/26] KVM: arm/arm64: Set VCPU affinity for virt timer irq Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 12/26] KVM: arm/arm64: Avoid timer save/restore in vcpu entry/exit Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 13/26] KVM: arm/arm64: Support EL1 phys timer register access in set/get reg Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 14/26] KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 15/26] KVM: arm/arm64: Move phys_timer_emulate function Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 16/26] KVM: arm/arm64: Avoid phys timer emulation in vcpu entry/exit Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 17/26] KVM: arm/arm64: Get rid of kvm_timer_flush_hwstate Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 18/26] KVM: arm/arm64: Rework kvm_timer_should_fire Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 19/26] arm/arm64: KVM: Load the timer state when enabling the timer Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 20/26] KVM: arm/arm64: vgic-its: Remove kvm_its_unmap_device Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 21/26] KVM: arm/arm64: vgic-its: New helper functions to free the caches Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` Christoffer Dall [this message]
2017-11-07 10:47   ` [PULL 22/26] KVM: arm/arm64: vgic-its: Free caches when GITS_BASER Valid bit is cleared Christoffer Dall
2017-11-07 10:47 ` [PULL 23/26] KVM: arm/arm64: Document KVM_DEV_ARM_ITS_CTRL_RESET Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 24/26] KVM: arm/arm64: vgic-its: Implement KVM_DEV_ARM_ITS_CTRL_RESET Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 25/26] KVM: arm/arm64: Unify 32bit fault injection Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-07 10:47 ` [PULL 26/26] KVM: arm/arm64: fix the incompatible matching for external abort Christoffer Dall
2017-11-07 10:47   ` Christoffer Dall
2017-11-09 18:04 ` [PULL 00/26] KVM/ARM Changes for v4.15 Radim Krčmář
2017-11-09 18:04   ` Radim Krčmář

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