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From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/2] drm/i915: Clear per-engine fault register as early as possible
Date: Fri, 10 Nov 2017 16:44:47 -0800	[thread overview]
Message-ID: <20171111004448.12360-1-michel.thierry@intel.com> (raw)

From gen6, the hardware tracks address lookup failures and we should
clear those registers upon startup to prevent false positives. However,
this was happening before we have the engines defined (intel_uncore_init())
and the for_each_engine loop was just a nop. The earliest we can call
this is inside intel_engines_init_mmio().

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
 drivers/gpu/drm/i915/intel_uncore.c    | 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index a0f9d0eb4bce..70bbe8ef8f54 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -289,6 +289,8 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
 
 	device_info->num_rings = hweight32(mask);
 
+	i915_check_and_clear_faults(dev_priv);
+
 	return 0;
 
 cleanup:
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 211acee7c31d..a78ceafcc825 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1420,8 +1420,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
 
 	iosf_mbi_register_pmic_bus_access_notifier(
 		&dev_priv->uncore.pmic_bus_access_nb);
-
-	i915_check_and_clear_faults(dev_priv);
 }
 
 void intel_uncore_fini(struct drm_i915_private *dev_priv)
-- 
2.15.0

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             reply	other threads:[~2017-11-11  0:44 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-11  0:44 Michel Thierry [this message]
2017-11-11  0:44 ` [PATCH 2/2 v2] drm/i915: There is only one fault register from GEN8 onwards Michel Thierry
2017-11-13 17:36   ` [PATCH v3] " Michel Thierry
2017-11-11  1:03 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Clear per-engine fault register as early as possible Patchwork
2017-11-11  1:15   ` Chris Wilson
2017-11-11  1:26     ` Michel Thierry
2017-11-11  2:38 ` ✓ Fi.CI.IGT: " Patchwork
2017-11-13 18:13 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Clear per-engine fault register as early as possible (rev2) Patchwork
2017-11-13 18:56   ` Chris Wilson
2017-11-13 19:44 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2016-07-27 18:11 [PATCH 1/2] drm/i915: Clear per-engine fault register as early as possible Chris Wilson
2016-07-28 10:12 ` Joonas Lahtinen
2016-07-28 10:57   ` Dave Gordon

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