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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: netdev@vger.kernel.org
Cc: f.fainelli@gmail.com, andrew@lunn.ch,
	linux-amlogic@lists.infradead.org, hkallweit1@gmail.com,
	Shengzhou.Liu@freescale.com, jaswinder.singh@linaro.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH net-next 3/5] net: phy: realtek: group all register bit #defines for RTL821x_INER
Date: Sat,  2 Dec 2017 22:51:26 +0100	[thread overview]
Message-ID: <20171202215128.20202-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20171202215128.20202-1-martin.blumenstingl@googlemail.com>

This simply moves all register bit #defines which describe the (PHY
specific) bits in the RTL821x_INER right below the RTL821x_INER register
definition. This makes it easier to spot which registers and bits belong
together.
No functional changes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/net/phy/realtek.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 59f0688e4d28..da263a92d6b1 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -20,13 +20,16 @@
 #define RTL821x_PHYSR		0x11
 #define RTL821x_PHYSR_DUPLEX	BIT(13)
 #define RTL821x_PHYSR_SPEED	GENMASK(15, 14)
+
 #define RTL821x_INER		0x12
 #define RTL8211B_INER_INIT	0x6400
+#define RTL8211E_INER_LINK_STATUS	BIT(10)
+#define RTL8211F_INER_LINK_STATUS	BIT(4)
+
 #define RTL821x_INSR		0x13
+
 #define RTL821x_PAGE_SELECT	0x1f
-#define RTL8211E_INER_LINK_STATUS	BIT(10)
 
-#define RTL8211F_INER_LINK_STATUS	BIT(4)
 #define RTL8211F_INSR		0x1d
 #define RTL8211F_TX_DELAY	BIT(8)
 
-- 
2.15.1

WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH net-next 3/5] net: phy: realtek: group all register bit #defines for RTL821x_INER
Date: Sat,  2 Dec 2017 22:51:26 +0100	[thread overview]
Message-ID: <20171202215128.20202-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20171202215128.20202-1-martin.blumenstingl@googlemail.com>

This simply moves all register bit #defines which describe the (PHY
specific) bits in the RTL821x_INER right below the RTL821x_INER register
definition. This makes it easier to spot which registers and bits belong
together.
No functional changes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/net/phy/realtek.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 59f0688e4d28..da263a92d6b1 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -20,13 +20,16 @@
 #define RTL821x_PHYSR		0x11
 #define RTL821x_PHYSR_DUPLEX	BIT(13)
 #define RTL821x_PHYSR_SPEED	GENMASK(15, 14)
+
 #define RTL821x_INER		0x12
 #define RTL8211B_INER_INIT	0x6400
+#define RTL8211E_INER_LINK_STATUS	BIT(10)
+#define RTL8211F_INER_LINK_STATUS	BIT(4)
+
 #define RTL821x_INSR		0x13
+
 #define RTL821x_PAGE_SELECT	0x1f
-#define RTL8211E_INER_LINK_STATUS	BIT(10)
 
-#define RTL8211F_INER_LINK_STATUS	BIT(4)
 #define RTL8211F_INSR		0x1d
 #define RTL8211F_TX_DELAY	BIT(8)
 
-- 
2.15.1

  parent reply	other threads:[~2017-12-02 21:51 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-02 21:51 [PATCH net-next 0/5] Realtek Ethernet PHY driver improvements Martin Blumenstingl
2017-12-02 21:51 ` Martin Blumenstingl
2017-12-02 21:51 ` [PATCH net-next 1/5] net: phy: realtek: use the BIT and GENMASK macros Martin Blumenstingl
2017-12-02 21:51   ` Martin Blumenstingl
2017-12-03  3:24   ` Andrew Lunn
2017-12-03  3:24     ` Andrew Lunn
2017-12-02 21:51 ` [PATCH net-next 2/5] net: phy: realtek: rename RTL821x_INER_INIT to RTL8211B_INER_INIT Martin Blumenstingl
2017-12-02 21:51   ` Martin Blumenstingl
2017-12-03  3:24   ` Andrew Lunn
2017-12-03  3:24     ` Andrew Lunn
2017-12-02 21:51 ` Martin Blumenstingl [this message]
2017-12-02 21:51   ` [PATCH net-next 3/5] net: phy: realtek: group all register bit #defines for RTL821x_INER Martin Blumenstingl
2017-12-03  3:25   ` Andrew Lunn
2017-12-03  3:25     ` Andrew Lunn
2017-12-02 21:51 ` [PATCH net-next 4/5] net: phy: realtek: use the same indentation for all #defines Martin Blumenstingl
2017-12-02 21:51   ` Martin Blumenstingl
2017-12-03  3:26   ` Andrew Lunn
2017-12-03  3:26     ` Andrew Lunn
2017-12-02 21:51 ` [PATCH net-next 5/5] net: phy: realtek: add utility functions to read/write page addresses Martin Blumenstingl
2017-12-02 21:51   ` Martin Blumenstingl
2017-12-03  3:29   ` Andrew Lunn
2017-12-03  3:29     ` Andrew Lunn
2017-12-03 14:38 ` [PATCH net-next 0/5] Realtek Ethernet PHY driver improvements David Miller
2017-12-03 14:38   ` David Miller

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