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From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
	Magnus Damm <magnus.damm@gmail.com>,
	Takeshi Kihara <takeshi.kihara.df@renesas.com>,
	Simon Horman <horms+renesas@verge.net.au>
Subject: [PATCH v4 6/6] clk: renesas: r8a7796: Add Z2 clock
Date: Wed,  3 Jan 2018 13:18:40 +0100	[thread overview]
Message-ID: <20180103121840.29316-7-horms+renesas@verge.net.au> (raw)
In-Reply-To: <20180103121840.29316-1-horms+renesas@verge.net.au>

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

This patch adds Z2 clock for R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 82b444ac66c6..83a68e51e4ec 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -75,6 +75,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
 
 	/* Core Clock Outputs */
 	DEF_BASE("z",           R8A7796_CLK_Z,     CLK_TYPE_GEN3_Z, CLK_PLL0),
+	DEF_BASE("z2",          R8A7796_CLK_Z2,    CLK_TYPE_GEN3_Z2, CLK_PLL2),
 	DEF_FIXED("ztr",        R8A7796_CLK_ZTR,   CLK_PLL1_DIV2,  6, 1),
 	DEF_FIXED("ztrd2",      R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
 	DEF_FIXED("zt",         R8A7796_CLK_ZT,    CLK_PLL1_DIV2,  4, 1),
-- 
2.11.0

WARNING: multiple messages have this Message-ID (diff)
From: horms+renesas@verge.net.au (Simon Horman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/6] clk: renesas: r8a7796: Add Z2 clock
Date: Wed,  3 Jan 2018 13:18:40 +0100	[thread overview]
Message-ID: <20180103121840.29316-7-horms+renesas@verge.net.au> (raw)
In-Reply-To: <20180103121840.29316-1-horms+renesas@verge.net.au>

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

This patch adds Z2 clock for R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 82b444ac66c6..83a68e51e4ec 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -75,6 +75,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
 
 	/* Core Clock Outputs */
 	DEF_BASE("z",           R8A7796_CLK_Z,     CLK_TYPE_GEN3_Z, CLK_PLL0),
+	DEF_BASE("z2",          R8A7796_CLK_Z2,    CLK_TYPE_GEN3_Z2, CLK_PLL2),
 	DEF_FIXED("ztr",        R8A7796_CLK_ZTR,   CLK_PLL1_DIV2,  6, 1),
 	DEF_FIXED("ztrd2",      R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
 	DEF_FIXED("zt",         R8A7796_CLK_ZT,    CLK_PLL1_DIV2,  4, 1),
-- 
2.11.0

  parent reply	other threads:[~2018-01-03 12:19 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-03 12:18 [PATCH v4 0/6] clk: renesas: r8a779[56]: Add Z and Z2 clock support Simon Horman
2018-01-03 12:18 ` Simon Horman
2018-01-03 12:18 ` [PATCH v4 1/6] clk: renesas: rcar-gen3: Add Z clock divider support Simon Horman
2018-01-03 12:18   ` Simon Horman
2018-01-03 12:18 ` [PATCH v4 2/6] clk: renesas: rcar-gen3: Add Z2 " Simon Horman
2018-01-03 12:18   ` Simon Horman
2018-01-03 12:47   ` Geert Uytterhoeven
2018-01-03 12:47     ` Geert Uytterhoeven
2018-01-05 14:04     ` Simon Horman
2018-01-05 14:04       ` Simon Horman
2018-01-05 14:35       ` Geert Uytterhoeven
2018-01-05 14:35         ` Geert Uytterhoeven
2018-01-08  8:02         ` Simon Horman
2018-01-08  8:02           ` Simon Horman
2018-01-08  8:06           ` Geert Uytterhoeven
2018-01-08  8:06             ` Geert Uytterhoeven
2018-01-29 14:24         ` Simon Horman
2018-01-29 14:24           ` Simon Horman
2018-01-29 15:01           ` Geert Uytterhoeven
2018-01-29 15:01             ` Geert Uytterhoeven
2018-01-29 15:19             ` Simon Horman
2018-01-29 15:19               ` Simon Horman
2018-01-29 15:46               ` Geert Uytterhoeven
2018-01-29 15:46                 ` Geert Uytterhoeven
2018-01-29 16:42                 ` Simon Horman
2018-01-29 16:42                   ` Simon Horman
2018-01-29 15:51               ` Simon Horman
2018-01-29 15:51                 ` Simon Horman
2018-01-29 16:31                 ` Simon Horman
2018-01-29 16:31                   ` Simon Horman
2018-01-03 12:18 ` [PATCH v4 3/6] clk: renesas: r8a7795: Add Z clock Simon Horman
2018-01-03 12:18   ` Simon Horman
2018-01-03 12:18 ` [PATCH v4 4/6] clk: renesas: r8a7795: Add Z2 clock Simon Horman
2018-01-03 12:18   ` Simon Horman
2018-01-03 12:18 ` [PATCH v4 5/6] clk: renesas: r8a7796: Add Z clock Simon Horman
2018-01-03 12:18   ` Simon Horman
2018-01-03 12:18 ` Simon Horman [this message]
2018-01-03 12:18   ` [PATCH v4 6/6] clk: renesas: r8a7796: Add Z2 clock Simon Horman

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