From: Jerome Brunet <jbrunet@baylibre.com> To: Neil Armstrong <narmstrong@baylibre.com>, Kevin Hilman <khilman@baylibre.com> Cc: Jerome Brunet <jbrunet@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Carlo Caione <carlo@caione.org>, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/11] clk: meson: add fractional part of meson8b fixed_pll Date: Mon, 19 Feb 2018 12:21:36 +0100 [thread overview] Message-ID: <20180219112146.21746-2-jbrunet@baylibre.com> (raw) In-Reply-To: <20180219112146.21746-1-jbrunet@baylibre.com> Add the missing frac parameter to the meson8b fixed_pll. It seems to be always on this platform, so the rate remains unchanged Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- drivers/clk/meson/meson8b.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index ea73b5de9672..62c54a75a1d2 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -125,6 +125,11 @@ static struct clk_regmap meson8b_fixed_pll = { .shift = 16, .width = 2, }, + .frac = { + .reg_off = HHI_MPLL_CNTL2, + .shift = 0, + .width = 12, + }, .l = { .reg_off = HHI_MPLL_CNTL, .shift = 31, -- 2.14.3
WARNING: multiple messages have this Message-ID (diff)
From: jbrunet@baylibre.com (Jerome Brunet) To: linus-amlogic@lists.infradead.org Subject: [PATCH 01/11] clk: meson: add fractional part of meson8b fixed_pll Date: Mon, 19 Feb 2018 12:21:36 +0100 [thread overview] Message-ID: <20180219112146.21746-2-jbrunet@baylibre.com> (raw) In-Reply-To: <20180219112146.21746-1-jbrunet@baylibre.com> Add the missing frac parameter to the meson8b fixed_pll. It seems to be always on this platform, so the rate remains unchanged Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- drivers/clk/meson/meson8b.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index ea73b5de9672..62c54a75a1d2 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -125,6 +125,11 @@ static struct clk_regmap meson8b_fixed_pll = { .shift = 16, .width = 2, }, + .frac = { + .reg_off = HHI_MPLL_CNTL2, + .shift = 0, + .width = 12, + }, .l = { .reg_off = HHI_MPLL_CNTL, .shift = 31, -- 2.14.3
next prev parent reply other threads:[~2018-02-19 11:24 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-02-19 11:21 [PATCH 00/11] clk: meson: second round of updates Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet [this message] 2018-02-19 11:21 ` [PATCH 01/11] clk: meson: add fractional part of meson8b fixed_pll Jerome Brunet 2018-02-19 11:21 ` [PATCH 02/11] clk: meson: poke pll CNTL last Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 03/11] clk: meson: remove special gp0 lock loop Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 04/11] clk: meson: improve pll driver results with frac Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 05/11] clk: meson: add gp0 frac parameter for axg and gxl Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 06/11] clk: meson: add ROUND_CLOSEST to the pll driver Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 07/11] clk: meson: axg: add hifi clock bindings Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 08/11] clk: meson: axg: add hifi pll clock Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 09/11] clk: meson: add mpll pre-divider Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 10/11] clk: meson: add fdiv clock gates Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-02-19 11:21 ` [PATCH 11/11] clk: meson: clean-up clk81 clocks Jerome Brunet 2018-02-19 11:21 ` Jerome Brunet 2018-03-12 10:22 ` [PATCH 00/11] clk: meson: second round of updates Neil Armstrong 2018-03-12 10:22 ` Neil Armstrong
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