From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Cc: igt-dev@lists.freedesktop.org Subject: [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx Date: Thu, 8 Mar 2018 00:13:18 +0000 [thread overview] Message-ID: <20180308001318.1628-1-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20180307224928.12996-1-chris@chris-wilson.co.uk> Exercise some new API that allows applications to request that individual contexts are executed within a desired frequency range. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- tests/Makefile.am | 1 + tests/Makefile.sources | 1 + tests/gem_ctx_freq.c | 338 +++++++++++++++++++++++++++++++++++++++++++++++++ tests/meson.build | 1 + 4 files changed, 341 insertions(+) create mode 100644 tests/gem_ctx_freq.c diff --git a/tests/Makefile.am b/tests/Makefile.am index dbc7be72..389f7fc7 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -104,6 +104,7 @@ drm_import_export_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) drm_import_export_LDADD = $(LDADD) -lpthread gem_close_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_close_race_LDADD = $(LDADD) -lpthread +gem_ctx_freq_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_ctx_thrash_LDADD = $(LDADD) -lpthread gem_exec_parallel_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 4a81ac4a..3d079c42 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -58,6 +58,7 @@ TESTS_progs = \ gem_ctx_bad_exec \ gem_ctx_create \ gem_ctx_exec \ + gem_ctx_freq \ gem_ctx_isolation \ gem_ctx_param \ gem_ctx_switch \ diff --git a/tests/gem_ctx_freq.c b/tests/gem_ctx_freq.c new file mode 100644 index 00000000..e68d9dd9 --- /dev/null +++ b/tests/gem_ctx_freq.c @@ -0,0 +1,338 @@ +/* + * Copyright © 2018 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include <unistd.h> +#include <stdlib.h> +#include <stdint.h> +#include <stdio.h> +#include <string.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <sys/time.h> +#include <time.h> + +#include "igt.h" +#include "igt_perf.h" + +#define LOCAL_CONTEXT_PARAM_FREQUENCY 8 + +static int __set_freq(int fd, uint32_t ctx, uint32_t min, uint32_t max) +{ + struct drm_i915_gem_context_param param = { + .ctx_id = ctx, + .param = LOCAL_CONTEXT_PARAM_FREQUENCY, + .value = (uint64_t)max << 32 | min, + }; + + return __gem_context_set_param(fd, ¶m); +} + +static void set_freq(int fd, uint32_t ctx, uint32_t min, uint32_t max) +{ + igt_assert_eq(__set_freq(fd, ctx, min, max), 0); +} + +static void get_freq(int fd, uint32_t ctx, uint32_t *min, uint32_t *max) +{ + struct drm_i915_gem_context_param param = { + .ctx_id = ctx, + .param = LOCAL_CONTEXT_PARAM_FREQUENCY, + }; + + gem_context_get_param(fd, ¶m); + + *min = param.value & 0xffffffff; + *max = param.value >> 32; +} + +static double measure_frequency(int pmu, int delay) +{ + uint64_t data[2]; + uint64_t d_t, d_v; + + igt_assert_eq(read(pmu, data, sizeof(data)), sizeof(data)); + d_v = -data[0]; + d_t = -data[1]; + + usleep(delay); + + igt_assert_eq(read(pmu, data, sizeof(data)), sizeof(data)); + d_v += data[0]; + d_t += data[1]; + + return d_v * 1e9 / d_t; +} + +static void single(int fd, const struct intel_execution_engine *e) +{ + const unsigned int engine = e->exec_id | e->flags; + uint32_t ctx = gem_context_create(fd); + uint32_t min, max; + double measured; + igt_spin_t *spin; + int pmu; + + get_freq(fd, ctx, &min, &max); + igt_info("Min freq: %dMHz; Max freq: %dMHz\n", min, max); + + pmu = perf_i915_open(I915_PMU_REQUESTED_FREQUENCY); + igt_require(pmu >= 0); + + gem_quiescent_gpu(fd); + measured = measure_frequency(pmu, 10000); + igt_info("Initial (idle) freq: %.1fMHz\n",measured); + igt_require(measured >= min - 50 && measured <= min + 50); + + for (uint32_t freq = min + 50; freq <= max; freq += 100) { + set_freq(fd, ctx, freq, freq); + + gem_quiescent_gpu(fd); + spin = __igt_spin_batch_new(fd, ctx, engine, 0); + usleep(10000); + + measured = measure_frequency(pmu, 50000); + igt_debugfs_dump(fd, "i915_rps_boost_info"); + + igt_spin_batch_free(fd, spin); + igt_info("%s(single): Measured %.1fMHz, expected %dMhz\n", + e->name, measured, freq); + igt_assert(measured > freq - 100 && measured < freq + 100); + } + gem_quiescent_gpu(fd); + + spin = __igt_spin_batch_new(fd, ctx, engine, 0); + for (uint32_t freq = min + 50; freq <= max; freq += 100) { + igt_spin_t *kick; + + set_freq(fd, ctx, freq, freq); + + /* + * When requesting a new frequency on the currently + * executing context, it does not take effect until the + * next context switch. In this case, we trigger a lite + * restore. + */ + kick = __igt_spin_batch_new(fd, ctx, engine, 0); + igt_spin_batch_free(fd, spin); + spin = kick; + + usleep(10000); + + measured = measure_frequency(pmu, 50000); + igt_debugfs_dump(fd, "i915_rps_boost_info"); + + igt_info("%s(continuous): Measured %.1fMHz, expected %dMhz\n", + e->name, measured, freq); + igt_assert(measured > freq - 100 && measured < freq + 100); + } + igt_spin_batch_free(fd, spin); + + gem_quiescent_gpu(fd); + measured = measure_frequency(pmu, 10000); + igt_info("Final (idle) freq: %.1fMHz\n", measured); + igt_assert(measured >= min - 50 && measured <= min + 50); + + close(pmu); + gem_context_destroy(fd, ctx); +} + +static void sandwich(int fd) +{ + uint32_t ctx = gem_context_create(fd); + unsigned int engine; + uint32_t min, max; + igt_spin_t *spin; + int pmu; + + pmu = perf_i915_open(I915_PMU_REQUESTED_FREQUENCY); + igt_require(pmu >= 0); + + spin = igt_spin_batch_new(fd, ctx, 0, 0); + get_freq(fd, ctx, &min, &max); + set_freq(fd, ctx, min, min); + for_each_physical_engine(fd, engine) { + struct drm_i915_gem_exec_object2 obj = { + .handle = spin->handle, + }; + struct drm_i915_gem_execbuffer2 eb = { + .buffer_count = 1, + .buffers_ptr = to_user_pointer(&obj), + .flags = engine, + .rsvd1 = ctx, + }; + double measured; + + min += 50; + if (min > max) + break; + + set_freq(fd, ctx, min, min); + gem_execbuf(fd, &eb); + usleep(10000); + + measured = measure_frequency(pmu, 50000); + igt_debugfs_dump(fd, "i915_rps_boost_info"); + + igt_info("Measured %.1fMHz, expected %dMhz\n", measured, min); + igt_assert(measured > min - 100 && measured < min + 100); + } + igt_spin_batch_free(fd, spin); + gem_quiescent_gpu(fd); + + gem_context_destroy(fd, ctx); + close(pmu); +} + +static void invalid_param(int fd) +{ + uint32_t min, max; + uint32_t cur_min, cur_max; + + get_freq(fd, 0, &min, &max); + + igt_assert_eq(__set_freq(fd, 0, min - 50, max), -EINVAL); + igt_assert_eq(__set_freq(fd, 0, min, max + 50), -EINVAL); + igt_assert_eq(__set_freq(fd, 0, min + 50, min), -EINVAL); + igt_assert_eq(__set_freq(fd, 0, max, max - 50), -EINVAL); + + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); +} + +static void idempotent(int fd) +{ + uint32_t min, max; + uint32_t cur_min, cur_max; + + get_freq(fd, 0, &min, &max); + + set_freq(fd, 0, max, max); + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, max); + igt_assert_eq(cur_max, max); + + set_freq(fd, 0, min, min); + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, min); + + set_freq(fd, 0, min, max); + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); +} + +static void independent(int fd) +{ + uint32_t min, max; + uint32_t cur_min, cur_max; + uint32_t ctx[2]; + + get_freq(fd, 0, &min, &max); + + set_freq(fd, 0, max, max); + ctx[0] = gem_context_create(fd); + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + set_freq(fd, 0, min, min); + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + ctx[1] = gem_context_create(fd); + get_freq(fd, ctx[1], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + set_freq(fd, ctx[1], max, max); + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, min); + + get_freq(fd, ctx[1], &cur_min, &cur_max); + igt_assert_eq(cur_min, max); + igt_assert_eq(cur_max, max); + gem_context_destroy(fd, ctx[1]); + + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + gem_context_destroy(fd, ctx[0]); +} + +static bool has_ctx_freq(int fd) +{ + struct drm_i915_gem_context_param param = { + .param = LOCAL_CONTEXT_PARAM_FREQUENCY, + }; + + return __gem_context_get_param(fd, ¶m) == 0; +} + +igt_main +{ + const struct intel_execution_engine *e; + int fd = -1; + + igt_fixture { + fd = drm_open_driver(DRIVER_INTEL); + igt_require_gem(fd); + + igt_require(has_ctx_freq(fd)); + } + + igt_subtest("invalid") + invalid_param(fd); + + igt_subtest("idempotent") + idempotent(fd); + + igt_subtest("independent") + independent(fd); + + igt_skip_on_simulation(); + + for (e = intel_execution_engines; e->name; e++) { + if (e->exec_id == 0) + continue; + + igt_subtest(e->name) { + igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags)); + single(fd, e); + } + } + + igt_subtest("sandwich") + sandwich(fd); +} diff --git a/tests/meson.build b/tests/meson.build index 58729231..f1271274 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -35,6 +35,7 @@ test_progs = [ 'gem_ctx_bad_exec', 'gem_ctx_create', 'gem_ctx_exec', + 'gem_ctx_freq', 'gem_ctx_param', 'gem_ctx_switch', 'gem_ctx_thrash', -- 2.16.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Cc: igt-dev@lists.freedesktop.org Subject: [igt-dev] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx Date: Thu, 8 Mar 2018 00:13:18 +0000 [thread overview] Message-ID: <20180308001318.1628-1-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20180307224928.12996-1-chris@chris-wilson.co.uk> Exercise some new API that allows applications to request that individual contexts are executed within a desired frequency range. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- tests/Makefile.am | 1 + tests/Makefile.sources | 1 + tests/gem_ctx_freq.c | 338 +++++++++++++++++++++++++++++++++++++++++++++++++ tests/meson.build | 1 + 4 files changed, 341 insertions(+) create mode 100644 tests/gem_ctx_freq.c diff --git a/tests/Makefile.am b/tests/Makefile.am index dbc7be72..389f7fc7 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -104,6 +104,7 @@ drm_import_export_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) drm_import_export_LDADD = $(LDADD) -lpthread gem_close_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_close_race_LDADD = $(LDADD) -lpthread +gem_ctx_freq_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_ctx_thrash_LDADD = $(LDADD) -lpthread gem_exec_parallel_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 4a81ac4a..3d079c42 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -58,6 +58,7 @@ TESTS_progs = \ gem_ctx_bad_exec \ gem_ctx_create \ gem_ctx_exec \ + gem_ctx_freq \ gem_ctx_isolation \ gem_ctx_param \ gem_ctx_switch \ diff --git a/tests/gem_ctx_freq.c b/tests/gem_ctx_freq.c new file mode 100644 index 00000000..e68d9dd9 --- /dev/null +++ b/tests/gem_ctx_freq.c @@ -0,0 +1,338 @@ +/* + * Copyright © 2018 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include <unistd.h> +#include <stdlib.h> +#include <stdint.h> +#include <stdio.h> +#include <string.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <sys/time.h> +#include <time.h> + +#include "igt.h" +#include "igt_perf.h" + +#define LOCAL_CONTEXT_PARAM_FREQUENCY 8 + +static int __set_freq(int fd, uint32_t ctx, uint32_t min, uint32_t max) +{ + struct drm_i915_gem_context_param param = { + .ctx_id = ctx, + .param = LOCAL_CONTEXT_PARAM_FREQUENCY, + .value = (uint64_t)max << 32 | min, + }; + + return __gem_context_set_param(fd, ¶m); +} + +static void set_freq(int fd, uint32_t ctx, uint32_t min, uint32_t max) +{ + igt_assert_eq(__set_freq(fd, ctx, min, max), 0); +} + +static void get_freq(int fd, uint32_t ctx, uint32_t *min, uint32_t *max) +{ + struct drm_i915_gem_context_param param = { + .ctx_id = ctx, + .param = LOCAL_CONTEXT_PARAM_FREQUENCY, + }; + + gem_context_get_param(fd, ¶m); + + *min = param.value & 0xffffffff; + *max = param.value >> 32; +} + +static double measure_frequency(int pmu, int delay) +{ + uint64_t data[2]; + uint64_t d_t, d_v; + + igt_assert_eq(read(pmu, data, sizeof(data)), sizeof(data)); + d_v = -data[0]; + d_t = -data[1]; + + usleep(delay); + + igt_assert_eq(read(pmu, data, sizeof(data)), sizeof(data)); + d_v += data[0]; + d_t += data[1]; + + return d_v * 1e9 / d_t; +} + +static void single(int fd, const struct intel_execution_engine *e) +{ + const unsigned int engine = e->exec_id | e->flags; + uint32_t ctx = gem_context_create(fd); + uint32_t min, max; + double measured; + igt_spin_t *spin; + int pmu; + + get_freq(fd, ctx, &min, &max); + igt_info("Min freq: %dMHz; Max freq: %dMHz\n", min, max); + + pmu = perf_i915_open(I915_PMU_REQUESTED_FREQUENCY); + igt_require(pmu >= 0); + + gem_quiescent_gpu(fd); + measured = measure_frequency(pmu, 10000); + igt_info("Initial (idle) freq: %.1fMHz\n",measured); + igt_require(measured >= min - 50 && measured <= min + 50); + + for (uint32_t freq = min + 50; freq <= max; freq += 100) { + set_freq(fd, ctx, freq, freq); + + gem_quiescent_gpu(fd); + spin = __igt_spin_batch_new(fd, ctx, engine, 0); + usleep(10000); + + measured = measure_frequency(pmu, 50000); + igt_debugfs_dump(fd, "i915_rps_boost_info"); + + igt_spin_batch_free(fd, spin); + igt_info("%s(single): Measured %.1fMHz, expected %dMhz\n", + e->name, measured, freq); + igt_assert(measured > freq - 100 && measured < freq + 100); + } + gem_quiescent_gpu(fd); + + spin = __igt_spin_batch_new(fd, ctx, engine, 0); + for (uint32_t freq = min + 50; freq <= max; freq += 100) { + igt_spin_t *kick; + + set_freq(fd, ctx, freq, freq); + + /* + * When requesting a new frequency on the currently + * executing context, it does not take effect until the + * next context switch. In this case, we trigger a lite + * restore. + */ + kick = __igt_spin_batch_new(fd, ctx, engine, 0); + igt_spin_batch_free(fd, spin); + spin = kick; + + usleep(10000); + + measured = measure_frequency(pmu, 50000); + igt_debugfs_dump(fd, "i915_rps_boost_info"); + + igt_info("%s(continuous): Measured %.1fMHz, expected %dMhz\n", + e->name, measured, freq); + igt_assert(measured > freq - 100 && measured < freq + 100); + } + igt_spin_batch_free(fd, spin); + + gem_quiescent_gpu(fd); + measured = measure_frequency(pmu, 10000); + igt_info("Final (idle) freq: %.1fMHz\n", measured); + igt_assert(measured >= min - 50 && measured <= min + 50); + + close(pmu); + gem_context_destroy(fd, ctx); +} + +static void sandwich(int fd) +{ + uint32_t ctx = gem_context_create(fd); + unsigned int engine; + uint32_t min, max; + igt_spin_t *spin; + int pmu; + + pmu = perf_i915_open(I915_PMU_REQUESTED_FREQUENCY); + igt_require(pmu >= 0); + + spin = igt_spin_batch_new(fd, ctx, 0, 0); + get_freq(fd, ctx, &min, &max); + set_freq(fd, ctx, min, min); + for_each_physical_engine(fd, engine) { + struct drm_i915_gem_exec_object2 obj = { + .handle = spin->handle, + }; + struct drm_i915_gem_execbuffer2 eb = { + .buffer_count = 1, + .buffers_ptr = to_user_pointer(&obj), + .flags = engine, + .rsvd1 = ctx, + }; + double measured; + + min += 50; + if (min > max) + break; + + set_freq(fd, ctx, min, min); + gem_execbuf(fd, &eb); + usleep(10000); + + measured = measure_frequency(pmu, 50000); + igt_debugfs_dump(fd, "i915_rps_boost_info"); + + igt_info("Measured %.1fMHz, expected %dMhz\n", measured, min); + igt_assert(measured > min - 100 && measured < min + 100); + } + igt_spin_batch_free(fd, spin); + gem_quiescent_gpu(fd); + + gem_context_destroy(fd, ctx); + close(pmu); +} + +static void invalid_param(int fd) +{ + uint32_t min, max; + uint32_t cur_min, cur_max; + + get_freq(fd, 0, &min, &max); + + igt_assert_eq(__set_freq(fd, 0, min - 50, max), -EINVAL); + igt_assert_eq(__set_freq(fd, 0, min, max + 50), -EINVAL); + igt_assert_eq(__set_freq(fd, 0, min + 50, min), -EINVAL); + igt_assert_eq(__set_freq(fd, 0, max, max - 50), -EINVAL); + + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); +} + +static void idempotent(int fd) +{ + uint32_t min, max; + uint32_t cur_min, cur_max; + + get_freq(fd, 0, &min, &max); + + set_freq(fd, 0, max, max); + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, max); + igt_assert_eq(cur_max, max); + + set_freq(fd, 0, min, min); + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, min); + + set_freq(fd, 0, min, max); + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); +} + +static void independent(int fd) +{ + uint32_t min, max; + uint32_t cur_min, cur_max; + uint32_t ctx[2]; + + get_freq(fd, 0, &min, &max); + + set_freq(fd, 0, max, max); + ctx[0] = gem_context_create(fd); + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + set_freq(fd, 0, min, min); + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + ctx[1] = gem_context_create(fd); + get_freq(fd, ctx[1], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + set_freq(fd, ctx[1], max, max); + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + + get_freq(fd, 0, &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, min); + + get_freq(fd, ctx[1], &cur_min, &cur_max); + igt_assert_eq(cur_min, max); + igt_assert_eq(cur_max, max); + gem_context_destroy(fd, ctx[1]); + + get_freq(fd, ctx[0], &cur_min, &cur_max); + igt_assert_eq(cur_min, min); + igt_assert_eq(cur_max, max); + gem_context_destroy(fd, ctx[0]); +} + +static bool has_ctx_freq(int fd) +{ + struct drm_i915_gem_context_param param = { + .param = LOCAL_CONTEXT_PARAM_FREQUENCY, + }; + + return __gem_context_get_param(fd, ¶m) == 0; +} + +igt_main +{ + const struct intel_execution_engine *e; + int fd = -1; + + igt_fixture { + fd = drm_open_driver(DRIVER_INTEL); + igt_require_gem(fd); + + igt_require(has_ctx_freq(fd)); + } + + igt_subtest("invalid") + invalid_param(fd); + + igt_subtest("idempotent") + idempotent(fd); + + igt_subtest("independent") + independent(fd); + + igt_skip_on_simulation(); + + for (e = intel_execution_engines; e->name; e++) { + if (e->exec_id == 0) + continue; + + igt_subtest(e->name) { + igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags)); + single(fd, e); + } + } + + igt_subtest("sandwich") + sandwich(fd); +} diff --git a/tests/meson.build b/tests/meson.build index 58729231..f1271274 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -35,6 +35,7 @@ test_progs = [ 'gem_ctx_bad_exec', 'gem_ctx_create', 'gem_ctx_exec', + 'gem_ctx_freq', 'gem_ctx_param', 'gem_ctx_switch', 'gem_ctx_thrash', -- 2.16.2 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev
next prev parent reply other threads:[~2018-03-08 0:13 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-07 22:49 [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx Chris Wilson 2018-03-07 22:49 ` [igt-dev] " Chris Wilson 2018-03-07 23:00 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork 2018-03-08 0:13 ` Chris Wilson [this message] 2018-03-08 0:13 ` [igt-dev] [PATCH igt] " Chris Wilson 2018-03-08 0:42 ` [igt-dev] ✓ Fi.CI.BAT: success for igt: Add gem_ctx_freq to exercise requesting freq on a ctx (rev2) Patchwork 2018-03-08 0:55 ` [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx Antonio Argenziano 2018-03-08 0:55 ` [Intel-gfx] " Antonio Argenziano 2018-03-08 1:18 ` Chris Wilson 2018-03-08 1:18 ` [igt-dev] [Intel-gfx] " Chris Wilson 2018-03-08 17:33 ` Antonio Argenziano 2018-03-08 17:33 ` [igt-dev] [Intel-gfx] " Antonio Argenziano 2018-03-08 17:39 ` Chris Wilson 2018-03-08 17:39 ` [igt-dev] [Intel-gfx] " Chris Wilson 2018-03-08 1:49 ` [igt-dev] ✗ Fi.CI.IGT: failure for igt: Add gem_ctx_freq to exercise requesting freq on a ctx (rev2) Patchwork 2018-03-08 1:59 ` [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx Chris Wilson 2018-03-08 2:26 ` ✓ Fi.CI.BAT: success for " Patchwork 2018-03-08 3:12 ` ✓ Fi.CI.IGT: " Patchwork 2018-03-08 9:02 ` [PATCH igt v2] " Chris Wilson 2018-03-08 17:13 [PATCH igt] " Chris Wilson 2018-03-09 0:45 ` Antonio Argenziano 2018-03-09 1:03 ` Chris Wilson 2018-03-09 19:15 ` Antonio Argenziano 2018-03-09 20:37 ` Chris Wilson 2018-03-09 13:46 ` Chris Wilson 2018-03-09 17:06 ` Tvrtko Ursulin 2018-03-09 17:24 ` Chris Wilson 2018-03-09 21:35 ` Chris Wilson 2018-03-12 21:13 ` Antonio Argenziano 2018-03-13 12:38 ` Sagar Arun Kamble 2018-03-13 12:50 ` Chris Wilson 2018-03-13 13:26 ` Chris Wilson 2018-03-13 13:58 ` Chris Wilson 2018-03-14 8:15 ` Sagar Arun Kamble 2018-03-14 9:03 ` Chris Wilson 2018-03-14 9:49 ` Sagar Arun Kamble
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20180308001318.1628-1-chris@chris-wilson.co.uk \ --to=chris@chris-wilson.co.uk \ --cc=igt-dev@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.