From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH v2] drm/i915: Move CUR SURFLIVE definition to a better place.
Date: Mon, 12 Mar 2018 14:05:28 -0700 [thread overview]
Message-ID: <20180312210528.7905-1-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20180312203530.GQ5453@intel.com>
No functional change. But let's keep definitions clean
and cursor related register definitions together.
v2: Fix caps x no caps on same reg. Change name to match
original reg name. (by Ville).
Also fix name on code s/surlive/surflive and on subject
s/cur_surlife/cur surflive/.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 ++---
drivers/gpu/drm/i915/intel_psr.c | 4 ++--
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index abdc513a9edd..395b806ddbab 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6009,6 +6009,7 @@ enum {
#define CURSIZE _MMIO(0x700a0) /* 845/865 */
#define _CUR_FBC_CTL_A 0x700a0 /* ivb+ */
#define CUR_FBC_CTL_EN (1 << 31)
+#define _CURASURFLIVE 0x700ac /* g4x+ */
#define _CURBCNTR 0x700c0
#define _CURBBASE 0x700c4
#define _CURBPOS 0x700c8
@@ -6025,6 +6026,7 @@ enum {
#define CURBASE(pipe) _CURSOR2(pipe, _CURABASE)
#define CURPOS(pipe) _CURSOR2(pipe, _CURAPOS)
#define CUR_FBC_CTL(pipe) _CURSOR2(pipe, _CUR_FBC_CTL_A)
+#define CURSURFLIVE(pipe) _CURSOR2(pipe, _CURASURFLIVE)
#define CURSOR_A_OFFSET 0x70080
#define CURSOR_B_OFFSET 0x700c0
@@ -6032,9 +6034,6 @@ enum {
#define IVB_CURSOR_B_OFFSET 0x71080
#define IVB_CURSOR_C_OFFSET 0x72080
-#define _CUR_SURLIVE 0x700AC
-#define CUR_SURLIVE(pipe) _CURSOR2(pipe, _CUR_SURLIVE)
-
/* Display A control */
#define _DSPACNTR 0x70180
#define DISPLAY_PLANE_ENABLE (1<<31)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index d93ecfc5d739..2861add9d678 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1038,11 +1038,11 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
* This documented WA for bxt can be safely applied
* broadly so we can force HW tracking to exit PSR
* instead of disabling and re-enabling.
- * Workaround tells us to write 0 to CUR_SURLIVE_A,
+ * Workaround tells us to write 0 to CUR_SURFLIVE_A,
* but it makes more sense write to the current active
* pipe.
*/
- I915_WRITE(CUR_SURLIVE(pipe), 0);
+ I915_WRITE(CURSURFLIVE(pipe), 0);
}
}
--
2.13.6
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next prev parent reply other threads:[~2018-03-12 21:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-12 20:27 [PATCH] drm/i915: Move CUR_SURFLIFE definition to a better place Rodrigo Vivi
2018-03-12 20:35 ` Ville Syrjälä
2018-03-12 20:52 ` Rodrigo Vivi
2018-03-12 21:05 ` Rodrigo Vivi [this message]
2018-03-13 21:05 ` Rodrigo Vivi
2018-03-12 22:03 ` ✓ Fi.CI.BAT: success for drm/i915: Move CUR_SURFLIFE definition to a better place. (rev2) Patchwork
2018-03-13 3:14 ` ✗ Fi.CI.IGT: warning " Patchwork
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