From: Chen-Yu Tsai <wens@csie.org> To: Maxime Ripard <maxime.ripard@bootlin.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, David Airlie <airlied@linux.ie> Cc: Chen-Yu Tsai <wens@csie.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/8] drm/sun4i: Add support for A80 TCONs Date: Thu, 15 Mar 2018 19:41:31 +0800 [thread overview] Message-ID: <20180315114136.24747-4-wens@csie.org> (raw) In-Reply-To: <20180315114136.24747-1-wens@csie.org> The Allwinner A80 SoC has 2 documented TCONs. The display pipeline diagram from the user manual shows a third TCON, but it's missing an interrupt line, and its registers are not explained either. It's also not used in Allwinner's vendor BSP. The first TCON only has channel 0, for LCD panel output. The TCON hardware setup is peculiar in that the eDP reset must also be deasserted to allow access to the TCON. How the eDP module is wired in the SoC itself is never explained. The second TCON only has channel 1, and its output is connected to the HDMI encoder block. This patch adds a "needs_edp_reset" field to the tcon quirks structure, and adds quirks and compatible strings for the 2 documented TCONs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 27 +++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 1 + 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index d4a29847dadd..b4cef03861f7 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -855,6 +855,7 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, struct sunxi_engine *engine; struct device_node *remote; struct sun4i_tcon *tcon; + struct reset_control *edp_rstc; bool has_lvds_rst, has_lvds_alt, can_lvds; int ret; @@ -879,6 +880,20 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, return PTR_ERR(tcon->lcd_rst); } + if (tcon->quirks->needs_edp_reset) { + edp_rstc = devm_reset_control_get_shared(dev, "edp"); + if (IS_ERR(edp_rstc)) { + dev_err(dev, "Couldn't get edp reset line\n"); + return PTR_ERR(edp_rstc); + } + + ret = reset_control_deassert(edp_rstc); + if (ret) { + dev_err(dev, "Couldn't deassert edp reset line\n"); + return ret; + } + } + /* Make sure our TCON is reset */ ret = reset_control_reset(tcon->lcd_rst); if (ret) { @@ -1176,6 +1191,16 @@ static const struct sun4i_tcon_quirks sun8i_v3s_quirks = { .has_channel_0 = true, }; +static const struct sun4i_tcon_quirks sun9i_a80_tcon_lcd_quirks = { + .has_channel_0 = true, + .needs_edp_reset = true, +}; + +static const struct sun4i_tcon_quirks sun9i_a80_tcon_tv_quirks = { + .has_channel_1 = true, + .needs_edp_reset = true, +}; + /* sun4i_drv uses this list to check if a device node is a TCON */ const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun4i-a10-tcon", .data = &sun4i_a10_quirks }, @@ -1187,6 +1212,8 @@ const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks }, { .compatible = "allwinner,sun8i-a83t-tcon-tv", .data = &sun8i_a83t_tv_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, + { .compatible = "allwinner,sun9i-a80-tcon-lcd", .data = &sun9i_a80_tcon_lcd_quirks }, + { .compatible = "allwinner,sun9i-a80-tcon-tv", .data = &sun9i_a80_tcon_tv_quirks }, { } }; MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index abdc6ad6b384..c4979559b591 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -176,6 +176,7 @@ struct sun4i_tcon_quirks { bool has_channel_1; /* a33 does not have channel 1 */ bool has_lvds_alt; /* Does the LVDS clock have a parent other than the TCON clock? */ bool needs_de_be_mux; /* sun6i needs mux to select backend */ + bool needs_edp_reset; /* a80 edp reset needed for tcon0 access */ bool supports_lvds; /* Does the TCON support an LVDS output? */ /* callback to handle tcon muxing options */ -- 2.16.2
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/8] drm/sun4i: Add support for A80 TCONs Date: Thu, 15 Mar 2018 19:41:31 +0800 [thread overview] Message-ID: <20180315114136.24747-4-wens@csie.org> (raw) In-Reply-To: <20180315114136.24747-1-wens@csie.org> The Allwinner A80 SoC has 2 documented TCONs. The display pipeline diagram from the user manual shows a third TCON, but it's missing an interrupt line, and its registers are not explained either. It's also not used in Allwinner's vendor BSP. The first TCON only has channel 0, for LCD panel output. The TCON hardware setup is peculiar in that the eDP reset must also be deasserted to allow access to the TCON. How the eDP module is wired in the SoC itself is never explained. The second TCON only has channel 1, and its output is connected to the HDMI encoder block. This patch adds a "needs_edp_reset" field to the tcon quirks structure, and adds quirks and compatible strings for the 2 documented TCONs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 27 +++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 1 + 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index d4a29847dadd..b4cef03861f7 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -855,6 +855,7 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, struct sunxi_engine *engine; struct device_node *remote; struct sun4i_tcon *tcon; + struct reset_control *edp_rstc; bool has_lvds_rst, has_lvds_alt, can_lvds; int ret; @@ -879,6 +880,20 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, return PTR_ERR(tcon->lcd_rst); } + if (tcon->quirks->needs_edp_reset) { + edp_rstc = devm_reset_control_get_shared(dev, "edp"); + if (IS_ERR(edp_rstc)) { + dev_err(dev, "Couldn't get edp reset line\n"); + return PTR_ERR(edp_rstc); + } + + ret = reset_control_deassert(edp_rstc); + if (ret) { + dev_err(dev, "Couldn't deassert edp reset line\n"); + return ret; + } + } + /* Make sure our TCON is reset */ ret = reset_control_reset(tcon->lcd_rst); if (ret) { @@ -1176,6 +1191,16 @@ static const struct sun4i_tcon_quirks sun8i_v3s_quirks = { .has_channel_0 = true, }; +static const struct sun4i_tcon_quirks sun9i_a80_tcon_lcd_quirks = { + .has_channel_0 = true, + .needs_edp_reset = true, +}; + +static const struct sun4i_tcon_quirks sun9i_a80_tcon_tv_quirks = { + .has_channel_1 = true, + .needs_edp_reset = true, +}; + /* sun4i_drv uses this list to check if a device node is a TCON */ const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun4i-a10-tcon", .data = &sun4i_a10_quirks }, @@ -1187,6 +1212,8 @@ const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks }, { .compatible = "allwinner,sun8i-a83t-tcon-tv", .data = &sun8i_a83t_tv_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, + { .compatible = "allwinner,sun9i-a80-tcon-lcd", .data = &sun9i_a80_tcon_lcd_quirks }, + { .compatible = "allwinner,sun9i-a80-tcon-tv", .data = &sun9i_a80_tcon_tv_quirks }, { } }; MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index abdc6ad6b384..c4979559b591 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -176,6 +176,7 @@ struct sun4i_tcon_quirks { bool has_channel_1; /* a33 does not have channel 1 */ bool has_lvds_alt; /* Does the LVDS clock have a parent other than the TCON clock? */ bool needs_de_be_mux; /* sun6i needs mux to select backend */ + bool needs_edp_reset; /* a80 edp reset needed for tcon0 access */ bool supports_lvds; /* Does the TCON support an LVDS output? */ /* callback to handle tcon muxing options */ -- 2.16.2
next prev parent reply other threads:[~2018-03-15 11:41 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-15 11:41 [PATCH 0/8] ARM: sun9i: a80: Add display support Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-15 11:41 ` [PATCH 1/8] drm/sun4i: Add compatible strings for A80 TCONs Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-18 12:52 ` Rob Herring 2018-03-18 12:52 ` Rob Herring 2018-03-18 12:52 ` Rob Herring 2018-03-15 11:41 ` [PATCH 2/8] drm/sun4i: Add DT binding for Detail Enhancement Unit in Allwinner A80 SoC Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-18 12:52 ` Rob Herring 2018-03-18 12:52 ` Rob Herring 2018-03-18 12:52 ` Rob Herring 2018-03-15 11:41 ` Chen-Yu Tsai [this message] 2018-03-15 11:41 ` [PATCH 3/8] drm/sun4i: Add support for A80 TCONs Chen-Yu Tsai 2018-03-15 11:41 ` [PATCH 4/8] drm/sun4i: Add compatible strings for the A80 display pipeline Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-18 12:52 ` Rob Herring 2018-03-18 12:52 ` Rob Herring 2018-03-18 12:52 ` Rob Herring 2018-03-15 11:41 ` [PATCH 5/8] drm/sun4i: Add driver support for " Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-15 11:41 ` [PATCH 6/8] ARM: dts: sun9i: Add device nodes for documented display pipelines for A80 Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-15 11:41 ` [PATCH 7/8] ARM: dts: sun9i: Add pinmux settings for LCD0 RGB888 output Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-15 11:41 ` [PATCH 8/8] ARM: dts: sun9i: cubieboard4: Enable VGA display output Chen-Yu Tsai 2018-03-15 11:41 ` Chen-Yu Tsai 2018-03-19 21:13 ` [PATCH 0/8] ARM: sun9i: a80: Add display support Maxime Ripard 2018-03-19 21:13 ` Maxime Ripard
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