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From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Giuseppe Cavallaro <peppe.cavallaro@st.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Mark Brown <broonie@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, netdev@vger.kernel.org,
	Corentin Labbe <clabbe.montjoie@gmail.com>,
	Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH net-next v2 08/15] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from external device
Date: Wed,  2 May 2018 00:12:20 +0800	[thread overview]
Message-ID: <20180501161227.2110-9-wens@csie.org> (raw)
In-Reply-To: <20180501161227.2110-1-wens@csie.org>

On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU
address space. Using a standard syscon to access it provides no
coordination with the CCU driver for register access. Neither does
it prevent this and other drivers from accessing other, maybe critical,
clock control registers. On other SoCs, the register is in the "system
control" address space, which might also contain controls for mapping
SRAM to devices or the CPU. This hardware has the same issues.

Instead, for these types of setups, we let the device containing the
control register create a regmap tied to it. We can then get the device
from the existing syscon phandle, and retrieve the regmap with
dev_get_regmap().

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 50 ++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index bbc051474806..79e104a20e20 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -983,6 +983,34 @@ static struct mac_device_info *sun8i_dwmac_setup(void *ppriv)
 	return mac;
 }
 
+static struct regmap *sun8i_dwmac_get_syscon_from_dev(struct device_node *node)
+{
+	struct device_node *syscon_node;
+	struct platform_device *syscon_pdev;
+	struct regmap *regmap = NULL;
+
+	syscon_node = of_parse_phandle(node, "syscon", 0);
+	if (!syscon_node)
+		return ERR_PTR(-ENODEV);
+
+	syscon_pdev = of_find_device_by_node(syscon_node);
+	if (!syscon_pdev) {
+		/* platform device might not be probed yet */
+		regmap = ERR_PTR(-EPROBE_DEFER);
+		goto out_put_node;
+	}
+
+	/* If no regmap is found then the other device driver is at fault */
+	regmap = dev_get_regmap(&syscon_pdev->dev, NULL);
+	if (!regmap)
+		regmap = ERR_PTR(-EINVAL);
+
+	platform_device_put(syscon_pdev);
+out_put_node:
+	of_node_put(syscon_node);
+	return regmap;
+}
+
 static int sun8i_dwmac_probe(struct platform_device *pdev)
 {
 	struct plat_stmmacenet_data *plat_dat;
@@ -1027,7 +1055,27 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 		gmac->regulator = NULL;
 	}
 
-	regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "syscon");
+	/* The "GMAC clock control" register might be located in the
+	 * CCU address range (on the R40), or the system control address
+	 * range (on most other sun8i and later SoCs).
+	 *
+	 * The former controls most if not all clocks in the SoC. The
+	 * latter has an SoC identification register, and on some SoCs,
+	 * controls to map device specific SRAM to either the intended
+	 * peripheral, or the CPU address space.
+	 *
+	 * In either case, there should be a coordinated and restricted
+	 * method of accessing the register needed here. This is done by
+	 * having the device export a custom regmap, instead of a generic
+	 * syscon, which grants all access to all registers.
+	 *
+	 * To support old device trees, we fall back to using the syscon
+	 * interface if possible.
+	 */
+	regmap = sun8i_dwmac_get_syscon_from_dev(pdev->dev.of_node);
+	if (IS_ERR(regmap))
+		regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+							 "syscon");
 	if (IS_ERR(regmap)) {
 		ret = PTR_ERR(regmap);
 		dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret);
-- 
2.17.0

WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH net-next v2 08/15] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from external device
Date: Wed,  2 May 2018 00:12:20 +0800	[thread overview]
Message-ID: <20180501161227.2110-9-wens@csie.org> (raw)
In-Reply-To: <20180501161227.2110-1-wens@csie.org>

On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU
address space. Using a standard syscon to access it provides no
coordination with the CCU driver for register access. Neither does
it prevent this and other drivers from accessing other, maybe critical,
clock control registers. On other SoCs, the register is in the "system
control" address space, which might also contain controls for mapping
SRAM to devices or the CPU. This hardware has the same issues.

Instead, for these types of setups, we let the device containing the
control register create a regmap tied to it. We can then get the device
from the existing syscon phandle, and retrieve the regmap with
dev_get_regmap().

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 50 ++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index bbc051474806..79e104a20e20 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -983,6 +983,34 @@ static struct mac_device_info *sun8i_dwmac_setup(void *ppriv)
 	return mac;
 }
 
+static struct regmap *sun8i_dwmac_get_syscon_from_dev(struct device_node *node)
+{
+	struct device_node *syscon_node;
+	struct platform_device *syscon_pdev;
+	struct regmap *regmap = NULL;
+
+	syscon_node = of_parse_phandle(node, "syscon", 0);
+	if (!syscon_node)
+		return ERR_PTR(-ENODEV);
+
+	syscon_pdev = of_find_device_by_node(syscon_node);
+	if (!syscon_pdev) {
+		/* platform device might not be probed yet */
+		regmap = ERR_PTR(-EPROBE_DEFER);
+		goto out_put_node;
+	}
+
+	/* If no regmap is found then the other device driver is at fault */
+	regmap = dev_get_regmap(&syscon_pdev->dev, NULL);
+	if (!regmap)
+		regmap = ERR_PTR(-EINVAL);
+
+	platform_device_put(syscon_pdev);
+out_put_node:
+	of_node_put(syscon_node);
+	return regmap;
+}
+
 static int sun8i_dwmac_probe(struct platform_device *pdev)
 {
 	struct plat_stmmacenet_data *plat_dat;
@@ -1027,7 +1055,27 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 		gmac->regulator = NULL;
 	}
 
-	regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "syscon");
+	/* The "GMAC clock control" register might be located in the
+	 * CCU address range (on the R40), or the system control address
+	 * range (on most other sun8i and later SoCs).
+	 *
+	 * The former controls most if not all clocks in the SoC. The
+	 * latter has an SoC identification register, and on some SoCs,
+	 * controls to map device specific SRAM to either the intended
+	 * peripheral, or the CPU address space.
+	 *
+	 * In either case, there should be a coordinated and restricted
+	 * method of accessing the register needed here. This is done by
+	 * having the device export a custom regmap, instead of a generic
+	 * syscon, which grants all access to all registers.
+	 *
+	 * To support old device trees, we fall back to using the syscon
+	 * interface if possible.
+	 */
+	regmap = sun8i_dwmac_get_syscon_from_dev(pdev->dev.of_node);
+	if (IS_ERR(regmap))
+		regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+							 "syscon");
 	if (IS_ERR(regmap)) {
 		ret = PTR_ERR(regmap);
 		dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret);
-- 
2.17.0

  parent reply	other threads:[~2018-05-01 16:23 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-01 16:12 [PATCH net-next v2 00/15] ARM: sun8i: r40: Add Ethernet support Chen-Yu Tsai
2018-05-01 16:12 ` Chen-Yu Tsai
2018-05-01 16:12 ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 01/15] clk: sunxi-ng: r40: rewrite init code to a platform driver Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 02/15] clk: sunxi-ng: r40: export a regmap to access the GMAC register Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 03/15] dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:26   ` Rob Herring
2018-05-01 16:26     ` Rob Herring
2018-05-01 16:12 ` [PATCH net-next v2 04/15] dt-bindings: net: dwmac-sun8i: Sort syscon compatibles by alphabetical order Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 05/15] dt-bindings: net: dwmac-sun8i: simplify description of syscon property Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:27   ` Rob Herring
2018-05-01 16:27     ` Rob Herring
2018-05-01 16:12 ` [PATCH net-next v2 06/15] dt-bindings: net: dwmac-sun8i: Add binding for GMAC on Allwinner R40 SoC Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:28   ` Rob Herring
2018-05-01 16:28     ` Rob Herring
2018-05-01 16:12 ` [PATCH net-next v2 07/15] net: stmmac: dwmac-sun8i: Use regmap_field for syscon register access Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` Chen-Yu Tsai [this message]
2018-05-01 16:12   ` [PATCH net-next v2 08/15] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from external device Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 09/15] net: stmmac: dwmac-sun8i: Support different ranges for TX/RX delay chains Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 10/15] net: stmmac: dwmac-sun8i: Add support for GMAC on Allwinner R40 SoC Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 11/15] ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 12/15] ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 13/15] ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 14/15] soc: sunxi: export a regmap for EMAC clock reg on A64 Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-01 16:12 ` [PATCH net-next v2 15/15] arm64: dts: allwinner: a64: add SRAM controller device tree node Chen-Yu Tsai
2018-05-01 16:12   ` Chen-Yu Tsai
2018-05-02  9:51   ` Maxime Ripard
2018-05-02  9:51     ` Maxime Ripard
2018-05-02  9:53     ` Chen-Yu Tsai
2018-05-02  9:53       ` Chen-Yu Tsai
2018-05-02 10:19       ` Icenowy Zheng
2018-05-02 10:19         ` Icenowy Zheng
2018-05-02 10:19         ` Icenowy Zheng
2018-05-02 11:54         ` Maxime Ripard
2018-05-02 11:54           ` Maxime Ripard
2018-05-13 19:37           ` Chen-Yu Tsai
2018-05-13 19:37             ` Chen-Yu Tsai
2018-05-13 19:37             ` Chen-Yu Tsai
2018-05-14  8:03             ` Maxime Ripard
2018-05-14  8:03               ` Maxime Ripard
2018-05-16  6:47               ` Chen-Yu Tsai
2018-05-16  6:47                 ` Chen-Yu Tsai
2018-05-16  6:47                 ` Chen-Yu Tsai
2018-05-16 13:31                 ` Maxime Ripard
2018-05-16 13:31                   ` Maxime Ripard
2018-05-01 16:33 ` [PATCH net-next v2 00/15] ARM: sun8i: r40: Add Ethernet support Chen-Yu Tsai
2018-05-01 16:33   ` Chen-Yu Tsai
2018-05-02 15:06   ` David Miller
2018-05-02 15:06     ` David Miller
2018-05-03 13:12     ` Maxime Ripard
2018-05-03 13:12       ` Maxime Ripard
2018-05-03 18:40       ` David Miller
2018-05-03 18:40         ` David Miller
2018-05-04 15:03         ` Maxime Ripard
2018-05-04 15:03           ` Maxime Ripard
2018-05-02 15:04 ` David Miller
2018-05-02 15:04   ` David Miller

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