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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 7/8] drm/i915: count powergating transitions per engine
Date: Wed,  9 May 2018 18:48:50 +0100	[thread overview]
Message-ID: <20180509174851.13847-8-lionel.g.landwerlin@intel.com> (raw)
In-Reply-To: <20180509174851.13847-1-lionel.g.landwerlin@intel.com>

This can be used to monitor the number of powergating transition
changes for a particular workload.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 drivers/gpu/drm/i915/intel_engine_cs.c  | 3 +++
 drivers/gpu/drm/i915/intel_lrc.c        | 1 +
 drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++++++
 3 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 1bab0447c9dc..c795a674abf0 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -505,6 +505,7 @@ void intel_engine_setup_common(struct intel_engine_cs *engine)
 	i915_timeline_init(engine->i915, &engine->timeline, engine->name);
 
 	memset(&engine->last_sseu, 0, sizeof(engine->last_sseu));
+	atomic_set(&engine->sseu_transitions, 0);
 
 	intel_engine_init_execlist(engine);
 	intel_engine_init_hangcheck(engine);
@@ -1439,6 +1440,8 @@ void intel_engine_dump(struct intel_engine_cs *engine,
 	hexdump(m, engine->status_page.page_addr, PAGE_SIZE);
 
 	drm_printf(m, "Idle? %s\n", yesno(intel_engine_is_idle(engine)));
+
+	drm_printf(m, "Powergating transitions: %u\n", atomic_read(&engine->sseu_transitions));
 }
 
 static u8 user_class_map[] = {
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c9a51185b7fe..d0c429c4bd35 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -542,6 +542,7 @@ static void maybe_enable_noa_reprogram(struct i915_request *rq)
 	*cs++ = upper_32_bits(engine->noa_reprogram_vma->node.start);
 
 	engine->last_sseu = rq->sseu;
+	atomic_inc(&engine->sseu_transitions);
 }
 
 static void port_assign(struct execlist_port *port, struct i915_request *rq)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 955518a5396f..80819172619e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -357,6 +357,12 @@ struct intel_engine_cs {
 	 */
 	union intel_sseu last_sseu;
 
+	/**
+	 * @sseu_transitions: A counter of the number of powergating
+	 * transition this engine has gone through.
+	 */
+	atomic_t sseu_transitions;
+
 	atomic_t irq_count;
 	unsigned long irq_posted;
 #define ENGINE_IRQ_BREADCRUMB 0
-- 
2.17.0

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  parent reply	other threads:[~2018-05-09 17:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-09 17:48 [PATCH v4 0/8] drm/i915: per context slice/subslice powergating Lionel Landwerlin
2018-05-09 17:48 ` [PATCH v4 1/8] drm/i915: Program RPCS for Broadwell Lionel Landwerlin
2018-05-09 17:48 ` [PATCH v4 2/8] drm/i915: Record the sseu configuration per-context & engine Lionel Landwerlin
2018-05-09 17:48 ` [PATCH v4 3/8] drm/i915/perf: simplify configure all context function Lionel Landwerlin
2018-05-09 17:48 ` [PATCH v4 4/8] drm/i915: add new pipe control helper for mmio writes Lionel Landwerlin
2018-05-09 17:48 ` [PATCH v4 5/8] drm/i915: give engine to execlists cancel helper Lionel Landwerlin
2018-05-09 17:48 ` [PATCH v4 6/8] drm/i915: reprogram NOA muxes on context switch when using perf Lionel Landwerlin
2018-05-09 23:38   ` Lionel Landwerlin
2018-05-09 17:48 ` Lionel Landwerlin [this message]
2018-05-09 17:48 ` [PATCH v4 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace Lionel Landwerlin
2018-05-09 19:03 ` ✗ Fi.CI.BAT: failure for drm/i915: per context slice/subslice powergating (rev3) Patchwork

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