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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, edgar.iglesias@xilinx.com
Subject: [Qemu-devel] [PULL v1 08/38] target-microblaze: Remove USE_MMU PVR checks
Date: Tue, 29 May 2018 12:49:41 +0200	[thread overview]
Message-ID: <20180529105011.1914-9-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <20180529105011.1914-1-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

We already have a CPU property to control if a core has
an MMU or not. Remove USE_MMU PVR checks in favor of
looking at the property.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/helper.c | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 387d4aca5a..a9f4ca93e3 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -54,21 +54,11 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
     MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
     CPUMBState *env = &cpu->env;
     unsigned int hit;
-    unsigned int mmu_available;
     int r = 1;
     int prot;
 
-    mmu_available = 0;
-    if (cpu->cfg.use_mmu) {
-        mmu_available = 1;
-        if ((cpu->cfg.pvr == C_PVR_FULL) &&
-            (env->pvr.regs[11] & PVR11_USE_MMU) != PVR11_USE_MMU) {
-            mmu_available = 0;
-        }
-    }
-
     /* Translate if the MMU is available and enabled.  */
-    if (mmu_available && (env->sregs[SR_MSR] & MSR_VM)) {
+    if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)) {
         uint32_t vaddr, paddr;
         struct microblaze_mmu_lookup lu;
 
-- 
2.14.1

  parent reply	other threads:[~2018-05-29 10:50 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-29 10:49 [Qemu-devel] [PULL v1 00/38] Xilinx queue Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 01/38] target-microblaze: dec_load: Use bool instead of unsigned int Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 02/38] target-microblaze: dec_store: " Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 03/38] target-microblaze: compute_ldst_addr: Use bool instead of int Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 04/38] target-microblaze: Fallback to our latest CPU version Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 05/38] target-microblaze: Correct special register array sizes Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 06/38] target-microblaze: Correct the PVR array size Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 07/38] target-microblaze: Tighten up TCGv_i32 vs TCGv type usage Edgar E. Iglesias
2018-05-29 10:49 ` Edgar E. Iglesias [this message]
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 09/38] target-microblaze: Conditionalize setting of PVR11_USE_MMU Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 10/38] target-microblaze: Bypass MMU with MMU_NOMMU_IDX Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 11/38] target-microblaze: Make compute_ldst_addr always use a temp Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 12/38] target-microblaze: Remove pointer indirection for ld/st addresses Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 13/38] target-microblaze: Use TCGv for load/store addresses Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 14/38] target-microblaze: Name special registers we support Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 15/38] target-microblaze: Break out trap_userspace() Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 16/38] target-microblaze: Break out trap_illegal() Edgar E. Iglesias
2018-06-04 13:12   ` Peter Maydell
2018-06-05 17:44     ` Edgar Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 17/38] target-microblaze: dec_msr: Use bool and extract32 Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 18/38] target-microblaze: dec_msr: Reuse more code when reg-decoding Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 19/38] target-microblaze: dec_msr: Fix MTS to FSR Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 20/38] target-microblaze: Make special registers 64-bit Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 21/38] target-microblaze: Setup for 64bit addressing Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 23/38] target-microblaze: Implement MFSE EAR Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 24/38] target-microblaze: mmu: Add R_TBLX_MISS macros Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 25/38] target-microblaze: mmu: Remove unused register state Edgar E. Iglesias
2018-05-29 10:49 ` [Qemu-devel] [PULL v1 26/38] target-microblaze: mmu: Prepare for 64-bit addresses Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 27/38] target-microblaze: mmu: Add a configurable output address mask Edgar E. Iglesias
2018-06-04 13:15   ` Peter Maydell
2018-06-05 17:42     ` Edgar Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 28/38] target-microblaze: dec_msr: Plug a temp leak Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 29/38] target-microblaze: Add support for extended access to TLBLO Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 30/38] target-microblaze: Allow address sizes between 32 and 64 bits Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 31/38] target-microblaze: Simplify address computation using tcg_gen_addi_i32() Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 32/38] target-microblaze: mmu: Cleanup debug log messages Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 33/38] target-microblaze: Use table based condition-codes conversion Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 34/38] target-microblaze: Remove argument b in eval_cc() Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 35/38] target-microblaze: Convert env_btarget to i64 Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 36/38] target-microblaze: Use tcg_gen_movcond in eval_cond_jmp Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 37/38] target-microblaze: cpu_mmu_index: Fixup indentation Edgar E. Iglesias
2018-05-29 10:50 ` [Qemu-devel] [PULL v1 38/38] target-microblaze: Consolidate MMU enabled checks Edgar E. Iglesias
2018-05-29 12:52 ` [Qemu-devel] [PULL v1 00/38] Xilinx queue Peter Maydell

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