From: Nick Desaulniers <ndesaulniers@google.com> To: akpm@linux-foundation.org, hpa@zytor.com, mingo@redhat.com, tglx@linutronix.de Cc: linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux-foundation.org, astrachan@google.com, manojgupta@google.com, ghackmann@google.com, sedat.dilek@gmail.com, tstellar@redhat.com, keescook@google.com, yamada.masahiro@socionext.com, michal.lkml@markovi.net, linux-kbuild@vger.kernel.org, geert@linux-m68k.org, will.deacon@arm.com, mawilcox@microsoft.com, arnd@arndb.de, rientjes@google.com, acme@redhat.com, pombredanne@nexb.com, aryabinin@virtuozzo.com, kstewart@linuxfoundation.org, boris.ostrovsky@oracle.com, jan.kiszka@siemens.com, rostedt@goodmis.org, kirill.shutemov@linux.intel.com, ard.biesheuvel@linaro.org, akataria@vmware.com, brijesh.singh@amd.com, caoj.fnst@cn.fujitsu.com, gregkh@linuxfoundation.org, jarkko.sakkinen@linux.intel.com, jgross@suse.com, jpoimboe@redhat.com, mka@chromium.org, ndesaulniers@google.com, thomas.lendacky@amd.com, tweek@google.com, mjg59@google.com, joe@perches.com, "H. Peter Anvin" <hpa@linux.intel.com> Subject: [PATCH v4 2/3] x86/asm: add _ASM_ARG* constants for argument registers to <asm/asm.h> Date: Thu, 7 Jun 2018 13:49:26 -0700 [thread overview] Message-ID: <20180607204927.219329-3-ndesaulniers@google.com> (raw) In-Reply-To: <20180607204927.219329-1-ndesaulniers@google.com> From: "H. Peter Anvin" <hpa@linux.intel.com> i386 and x86-64 uses different registers for arguments; make them available so we don't have to #ifdef in the actual code. Native size and specified size (q, l, w, b) versions are provided. Suggested-by: Sedat Dilek <sedat.dilek@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> --- arch/x86/include/asm/asm.h | 59 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 219faaec51df..990770f9e76b 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -46,6 +46,65 @@ #define _ASM_SI __ASM_REG(si) #define _ASM_DI __ASM_REG(di) +#ifndef __x86_64__ +/* 32 bit */ + +#define _ASM_ARG1 _ASM_AX +#define _ASM_ARG2 _ASM_DX +#define _ASM_ARG3 _ASM_CX + +#define _ASM_ARG1L eax +#define _ASM_ARG2L edx +#define _ASM_ARG3L ecx + +#define _ASM_ARG1W ax +#define _ASM_ARG2W dx +#define _ASM_ARG3W cx + +#define _ASM_ARG1B al +#define _ASM_ARG2B dl +#define _ASM_ARG3B cl + +#else +/* 64 bit */ + +#define _ASM_ARG1 _ASM_DI +#define _ASM_ARG2 _ASM_SI +#define _ASM_ARG3 _ASM_DX +#define _ASM_ARG4 _ASM_CX +#define _ASM_ARG5 r8 +#define _ASM_ARG6 r9 + +#define _ASM_ARG1Q rdi +#define _ASM_ARG2Q rsi +#define _ASM_ARG3Q rdx +#define _ASM_ARG4Q rcx +#define _ASM_ARG5Q r8 +#define _ASM_ARG6Q r9 + +#define _ASM_ARG1L edi +#define _ASM_ARG2L esi +#define _ASM_ARG3L edx +#define _ASM_ARG4L ecx +#define _ASM_ARG5L r8d +#define _ASM_ARG6L r9d + +#define _ASM_ARG1W di +#define _ASM_ARG2W si +#define _ASM_ARG3W dx +#define _ASM_ARG4W cx +#define _ASM_ARG5W r8w +#define _ASM_ARG6W r9w + +#define _ASM_ARG1B dil +#define _ASM_ARG2B sil +#define _ASM_ARG3B dl +#define _ASM_ARG4B cl +#define _ASM_ARG5B r8b +#define _ASM_ARG6B r9b + +#endif + /* * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". -- 2.17.1.1185.g55be947832-goog
WARNING: multiple messages have this Message-ID (diff)
From: Nick Desaulniers <ndesaulniers@google.com> To: akpm@linux-foundation.org, hpa@zytor.com, mingo@redhat.com, tglx@linutronix.de Cc: linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux-foundation.org, astrachan@google.com, manojgupta@google.com, ghackmann@google.com, sedat.dilek@gmail.com, tstellar@redhat.com, keescook@google.com, yamada.masahiro@socionext.com, michal.lkml@markovi.net, linux-kbuild@vger.kernel.org, geert@linux-m68k.org, will.deacon@arm.com, mawilcox@microsoft.com, arnd@arndb.de, rientjes@google.com, acme@redhat.com, pombredanne@nexb.com, aryabinin@virtuozzo.com, kstewart@linuxfoundation.org, boris.ostrovsky@oracle.com, jan.kiszka@siemens.com, rostedt@goodmis.org, kirill.shutemov@linux.intel.com, ard.biesheuvel@linaro.org, akataria@vmware.com, brijesh.singh@amd.com, caoj.fnst@cn.fujitsu.com, gregkh@linuxfoundation.org, jarkko.sakkinen@linux.intel.co Subject: [PATCH v4 2/3] x86/asm: add _ASM_ARG* constants for argument registers to <asm/asm.h> Date: Thu, 7 Jun 2018 13:49:26 -0700 [thread overview] Message-ID: <20180607204927.219329-3-ndesaulniers@google.com> (raw) In-Reply-To: <20180607204927.219329-1-ndesaulniers@google.com> From: "H. Peter Anvin" <hpa@linux.intel.com> i386 and x86-64 uses different registers for arguments; make them available so we don't have to #ifdef in the actual code. Native size and specified size (q, l, w, b) versions are provided. Suggested-by: Sedat Dilek <sedat.dilek@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> --- arch/x86/include/asm/asm.h | 59 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 219faaec51df..990770f9e76b 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -46,6 +46,65 @@ #define _ASM_SI __ASM_REG(si) #define _ASM_DI __ASM_REG(di) +#ifndef __x86_64__ +/* 32 bit */ + +#define _ASM_ARG1 _ASM_AX +#define _ASM_ARG2 _ASM_DX +#define _ASM_ARG3 _ASM_CX + +#define _ASM_ARG1L eax +#define _ASM_ARG2L edx +#define _ASM_ARG3L ecx + +#define _ASM_ARG1W ax +#define _ASM_ARG2W dx +#define _ASM_ARG3W cx + +#define _ASM_ARG1B al +#define _ASM_ARG2B dl +#define _ASM_ARG3B cl + +#else +/* 64 bit */ + +#define _ASM_ARG1 _ASM_DI +#define _ASM_ARG2 _ASM_SI +#define _ASM_ARG3 _ASM_DX +#define _ASM_ARG4 _ASM_CX +#define _ASM_ARG5 r8 +#define _ASM_ARG6 r9 + +#define _ASM_ARG1Q rdi +#define _ASM_ARG2Q rsi +#define _ASM_ARG3Q rdx +#define _ASM_ARG4Q rcx +#define _ASM_ARG5Q r8 +#define _ASM_ARG6Q r9 + +#define _ASM_ARG1L edi +#define _ASM_ARG2L esi +#define _ASM_ARG3L edx +#define _ASM_ARG4L ecx +#define _ASM_ARG5L r8d +#define _ASM_ARG6L r9d + +#define _ASM_ARG1W di +#define _ASM_ARG2W si +#define _ASM_ARG3W dx +#define _ASM_ARG4W cx +#define _ASM_ARG5W r8w +#define _ASM_ARG6W r9w + +#define _ASM_ARG1B dil +#define _ASM_ARG2B sil +#define _ASM_ARG3B dl +#define _ASM_ARG4B cl +#define _ASM_ARG5B r8b +#define _ASM_ARG6B r9b + +#endif + /* * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". -- 2.17.1.1185.g55be947832-goog
next prev parent reply other threads:[~2018-06-07 20:50 UTC|newest] Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-06-07 20:49 [PATCH v4 0/3] extern inline native_save_fl for paravirt Nick Desaulniers 2018-06-07 20:49 ` Nick Desaulniers 2018-06-07 20:49 ` [PATCH v4 1/3] compiler-gcc.h: add gnu_inline to all inline declarations Nick Desaulniers 2018-06-07 20:49 ` Nick Desaulniers 2018-06-08 7:59 ` Arnd Bergmann 2018-06-08 7:59 ` Arnd Bergmann 2018-06-08 10:04 ` Sedat Dilek 2018-06-08 10:04 ` Sedat Dilek 2018-06-08 11:28 ` Andrea Parri 2018-06-08 11:28 ` Andrea Parri 2018-06-08 12:29 ` Sedat Dilek 2018-06-08 12:29 ` Sedat Dilek 2018-06-12 18:33 ` Nick Desaulniers 2018-06-12 18:33 ` Nick Desaulniers 2018-06-12 18:51 ` H. Peter Anvin 2018-06-12 18:51 ` H. Peter Anvin 2018-06-12 20:19 ` Nick Desaulniers 2018-06-12 20:19 ` Nick Desaulniers 2018-06-12 21:31 ` H. Peter Anvin 2018-06-12 21:31 ` H. Peter Anvin 2018-06-12 21:36 ` Nick Desaulniers 2018-06-12 21:36 ` Nick Desaulniers 2018-06-08 7:59 ` Arnd Bergmann 2018-06-07 20:49 ` Nick Desaulniers [this message] 2018-06-07 20:49 ` [PATCH v4 2/3] x86/asm: add _ASM_ARG* constants for argument registers to <asm/asm.h> Nick Desaulniers 2018-06-07 20:49 ` [PATCH v4 3/3] x86: paravirt: make native_save_fl extern inline Nick Desaulniers 2018-06-07 20:49 ` Nick Desaulniers
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20180607204927.219329-3-ndesaulniers@google.com \ --to=ndesaulniers@google.com \ --cc=acme@redhat.com \ --cc=akataria@vmware.com \ --cc=akpm@linux-foundation.org \ --cc=ard.biesheuvel@linaro.org \ --cc=arnd@arndb.de \ --cc=aryabinin@virtuozzo.com \ --cc=astrachan@google.com \ --cc=boris.ostrovsky@oracle.com \ --cc=brijesh.singh@amd.com \ --cc=caoj.fnst@cn.fujitsu.com \ --cc=geert@linux-m68k.org \ --cc=ghackmann@google.com \ --cc=gregkh@linuxfoundation.org \ --cc=hpa@linux.intel.com \ --cc=hpa@zytor.com \ --cc=jan.kiszka@siemens.com \ --cc=jarkko.sakkinen@linux.intel.com \ --cc=jgross@suse.com \ --cc=joe@perches.com \ --cc=jpoimboe@redhat.com \ --cc=keescook@google.com \ --cc=kirill.shutemov@linux.intel.com \ --cc=kstewart@linuxfoundation.org \ --cc=linux-efi@vger.kernel.org \ --cc=linux-kbuild@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=manojgupta@google.com \ --cc=mawilcox@microsoft.com \ --cc=michal.lkml@markovi.net \ --cc=mingo@redhat.com \ --cc=mjg59@google.com \ --cc=mka@chromium.org \ --cc=pombredanne@nexb.com \ --cc=rientjes@google.com \ --cc=rostedt@goodmis.org \ --cc=sedat.dilek@gmail.com \ --cc=tglx@linutronix.de \ --cc=thomas.lendacky@amd.com \ --cc=tstellar@redhat.com \ --cc=tweek@google.com \ --cc=virtualization@lists.linux-foundation.org \ --cc=will.deacon@arm.com \ --cc=x86@kernel.org \ --cc=yamada.masahiro@socionext.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.