From: Mark Rutland <mark.rutland@arm.com> To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com Cc: dave.martin@arm.com, hch@infradead.org, james.morse@arm.com, linux@dominikbrodowski.net, linux-fsdevel@vger.kernel.org, marc.zyngier@arm.com, mark.rutland@arm.com, viro@zeniv.linux.org.uk Subject: [PATCHv3 02/19] arm64: move SCTLR_EL{1,2} assertions to <asm/sysreg.h> Date: Mon, 18 Jun 2018 13:02:53 +0100 [thread overview] Message-ID: <20180618120310.39527-3-mark.rutland@arm.com> (raw) In-Reply-To: <20180618120310.39527-1-mark.rutland@arm.com> Currently we assert that the SCTLR_EL{1,2}_{SET,CLEAR} bits are self-consistent with an assertion in config_sctlr_el1(). This is a bit unusual, since config_sctlr_el1() doesn't make use of these definitions, and is far away from the definitions themselves. We can use the CPP #error directive to have equivalent assertions in <asm/sysreg.h>, next to the definitions of the set/clear bits, which is a bit clearer and simpler. At the same time, lets fill in the upper 32 bits for both registers in their repsective RES0 definitions. This could be a little nicer with GENMASK_ULL(63, 32), but this currently lives in <linux/bitops.h>, which cannot safely be included from assembly, as <asm/sysreg.h> can. Note the when the preprocessor evaluates an expression for an #if directive, all signed or unsigned values are treated as intmax_t or uintmax_t respectively. To avoid ambiguity, we define explicitly define the mask of all 64 bits. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Dave Martin <dave.martin@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Will Deacon <will.deacon@arm.com> --- arch/arm64/include/asm/sysreg.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 6171178075dc..48ad361c178e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -436,7 +436,8 @@ #define SCTLR_EL2_RES0 ((1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | \ (1 << 10) | (1 << 13) | (1 << 14) | (1 << 15) | \ (1 << 17) | (1 << 20) | (1 << 24) | (1 << 26) | \ - (1 << 27) | (1 << 30) | (1 << 31)) + (1 << 27) | (1 << 30) | (1 << 31) | \ + (0xffffffffUL << 32)) #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL2 SCTLR_ELx_EE @@ -452,9 +453,9 @@ SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_WXN | \ ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0) -/* Check all the bits are accounted for */ -#define SCTLR_EL2_BUILD_BUG_ON_MISSING_BITS BUILD_BUG_ON((SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != ~0) - +#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffff +#error "Inconsistent SCTLR_EL2 set/clear bits" +#endif /* SCTLR_EL1 specific flags. */ #define SCTLR_EL1_UCI (1 << 26) @@ -473,7 +474,8 @@ #define SCTLR_EL1_RES1 ((1 << 11) | (1 << 20) | (1 << 22) | (1 << 28) | \ (1 << 29)) #define SCTLR_EL1_RES0 ((1 << 6) | (1 << 10) | (1 << 13) | (1 << 17) | \ - (1 << 27) | (1 << 30) | (1 << 31)) + (1 << 27) | (1 << 30) | (1 << 31) | \ + (0xffffffffUL << 32)) #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE) @@ -492,8 +494,9 @@ SCTLR_EL1_UMA | SCTLR_ELx_WXN | ENDIAN_CLEAR_EL1 |\ SCTLR_EL1_RES0) -/* Check all the bits are accounted for */ -#define SCTLR_EL1_BUILD_BUG_ON_MISSING_BITS BUILD_BUG_ON((SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != ~0) +#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffff +#error "Inconsistent SCTLR_EL1 set/clear bits" +#endif /* id_aa64isar0 */ #define ID_AA64ISAR0_TS_SHIFT 52 @@ -732,9 +735,6 @@ static inline void config_sctlr_el1(u32 clear, u32 set) { u32 val; - SCTLR_EL2_BUILD_BUG_ON_MISSING_BITS; - SCTLR_EL1_BUILD_BUG_ON_MISSING_BITS; - val = read_sysreg(sctlr_el1); val &= ~clear; val |= set; -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland) To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv3 02/19] arm64: move SCTLR_EL{1, 2} assertions to <asm/sysreg.h> Date: Mon, 18 Jun 2018 13:02:53 +0100 [thread overview] Message-ID: <20180618120310.39527-3-mark.rutland@arm.com> (raw) In-Reply-To: <20180618120310.39527-1-mark.rutland@arm.com> Currently we assert that the SCTLR_EL{1,2}_{SET,CLEAR} bits are self-consistent with an assertion in config_sctlr_el1(). This is a bit unusual, since config_sctlr_el1() doesn't make use of these definitions, and is far away from the definitions themselves. We can use the CPP #error directive to have equivalent assertions in <asm/sysreg.h>, next to the definitions of the set/clear bits, which is a bit clearer and simpler. At the same time, lets fill in the upper 32 bits for both registers in their repsective RES0 definitions. This could be a little nicer with GENMASK_ULL(63, 32), but this currently lives in <linux/bitops.h>, which cannot safely be included from assembly, as <asm/sysreg.h> can. Note the when the preprocessor evaluates an expression for an #if directive, all signed or unsigned values are treated as intmax_t or uintmax_t respectively. To avoid ambiguity, we define explicitly define the mask of all 64 bits. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Dave Martin <dave.martin@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Will Deacon <will.deacon@arm.com> --- arch/arm64/include/asm/sysreg.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 6171178075dc..48ad361c178e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -436,7 +436,8 @@ #define SCTLR_EL2_RES0 ((1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | \ (1 << 10) | (1 << 13) | (1 << 14) | (1 << 15) | \ (1 << 17) | (1 << 20) | (1 << 24) | (1 << 26) | \ - (1 << 27) | (1 << 30) | (1 << 31)) + (1 << 27) | (1 << 30) | (1 << 31) | \ + (0xffffffffUL << 32)) #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL2 SCTLR_ELx_EE @@ -452,9 +453,9 @@ SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_WXN | \ ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0) -/* Check all the bits are accounted for */ -#define SCTLR_EL2_BUILD_BUG_ON_MISSING_BITS BUILD_BUG_ON((SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != ~0) - +#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffff +#error "Inconsistent SCTLR_EL2 set/clear bits" +#endif /* SCTLR_EL1 specific flags. */ #define SCTLR_EL1_UCI (1 << 26) @@ -473,7 +474,8 @@ #define SCTLR_EL1_RES1 ((1 << 11) | (1 << 20) | (1 << 22) | (1 << 28) | \ (1 << 29)) #define SCTLR_EL1_RES0 ((1 << 6) | (1 << 10) | (1 << 13) | (1 << 17) | \ - (1 << 27) | (1 << 30) | (1 << 31)) + (1 << 27) | (1 << 30) | (1 << 31) | \ + (0xffffffffUL << 32)) #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE) @@ -492,8 +494,9 @@ SCTLR_EL1_UMA | SCTLR_ELx_WXN | ENDIAN_CLEAR_EL1 |\ SCTLR_EL1_RES0) -/* Check all the bits are accounted for */ -#define SCTLR_EL1_BUILD_BUG_ON_MISSING_BITS BUILD_BUG_ON((SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != ~0) +#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffff +#error "Inconsistent SCTLR_EL1 set/clear bits" +#endif /* id_aa64isar0 */ #define ID_AA64ISAR0_TS_SHIFT 52 @@ -732,9 +735,6 @@ static inline void config_sctlr_el1(u32 clear, u32 set) { u32 val; - SCTLR_EL2_BUILD_BUG_ON_MISSING_BITS; - SCTLR_EL1_BUILD_BUG_ON_MISSING_BITS; - val = read_sysreg(sctlr_el1); val &= ~clear; val |= set; -- 2.11.0
next prev parent reply other threads:[~2018-06-18 12:03 UTC|newest] Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-06-18 12:02 [PATCHv3 00/19] arm64: invoke syscalls with pt_regs Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-18 12:02 ` [PATCHv3 01/19] arm64: consistently use unsigned long for thread flags Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-19 10:49 ` Catalin Marinas 2018-06-19 10:49 ` Catalin Marinas 2018-06-19 11:19 ` Mark Rutland 2018-06-19 11:19 ` Mark Rutland 2018-06-18 12:02 ` Mark Rutland [this message] 2018-06-18 12:02 ` [PATCHv3 02/19] arm64: move SCTLR_EL{1, 2} assertions to <asm/sysreg.h> Mark Rutland 2018-06-19 11:02 ` Catalin Marinas 2018-06-19 11:02 ` Catalin Marinas 2018-06-19 11:48 ` [PATCHv3 02/19] arm64: move SCTLR_EL{1,2} " Mark Rutland 2018-06-19 11:48 ` Mark Rutland 2018-06-18 12:02 ` [PATCHv3 03/19] arm64: introduce sysreg_clear_set() Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-19 11:44 ` Catalin Marinas 2018-06-19 11:44 ` Catalin Marinas 2018-06-19 11:47 ` Marc Zyngier 2018-06-19 11:47 ` Marc Zyngier 2018-06-18 12:02 ` [PATCHv3 04/19] arm64: kill config_sctlr_el1() Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-19 11:44 ` Catalin Marinas 2018-06-19 11:44 ` Catalin Marinas 2018-06-18 12:02 ` [PATCHv3 05/19] arm64: kill change_cpacr() Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-19 11:45 ` Catalin Marinas 2018-06-19 11:45 ` Catalin Marinas 2018-06-18 12:02 ` [PATCHv3 06/19] arm64: move sve_user_{enable,disable} to <asm/fpsimd.h> Mark Rutland 2018-06-18 12:02 ` [PATCHv3 06/19] arm64: move sve_user_{enable, disable} " Mark Rutland 2018-06-19 12:00 ` Catalin Marinas 2018-06-19 12:00 ` Catalin Marinas 2018-06-19 12:19 ` Dave Martin 2018-06-19 12:19 ` Dave Martin 2018-06-18 12:02 ` [PATCHv3 07/19] arm64: remove sigreturn wrappers Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-19 12:47 ` Catalin Marinas 2018-06-19 12:47 ` Catalin Marinas 2018-06-18 12:02 ` [PATCHv3 08/19] arm64: convert raw syscall invocation to C Mark Rutland 2018-06-18 12:02 ` Mark Rutland 2018-06-19 13:33 ` Catalin Marinas 2018-06-19 13:33 ` Catalin Marinas 2018-06-19 14:21 ` Catalin Marinas 2018-06-19 14:21 ` Catalin Marinas 2018-06-19 14:48 ` Mark Rutland 2018-06-19 14:48 ` Mark Rutland 2018-06-19 14:55 ` Catalin Marinas 2018-06-19 14:55 ` Catalin Marinas 2018-06-19 14:58 ` Mark Rutland 2018-06-19 14:58 ` Mark Rutland 2018-06-18 12:03 ` [PATCHv3 09/19] arm64: convert syscall trace logic " Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 14:32 ` Catalin Marinas 2018-06-19 14:32 ` Catalin Marinas 2018-06-19 15:14 ` Mark Rutland 2018-06-19 15:14 ` Mark Rutland 2018-06-18 12:03 ` [PATCHv3 10/19] arm64: convert native/compat syscall entry " Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 12:18 ` Dave Martin 2018-06-19 12:18 ` Dave Martin 2018-06-19 13:15 ` Mark Rutland 2018-06-19 13:15 ` Mark Rutland 2018-06-20 9:21 ` Dave Martin 2018-06-20 9:21 ` Dave Martin 2018-06-19 15:20 ` Catalin Marinas 2018-06-19 15:20 ` Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 11/19] arm64: don't reload GPRs after apply_ssbd Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:23 ` Catalin Marinas 2018-06-19 15:23 ` Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 12/19] arm64: zero GPRs upon entry from EL0 Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:24 ` Catalin Marinas 2018-06-19 15:24 ` Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 13/19] kernel: add ksys_personality() Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:45 ` Catalin Marinas 2018-06-19 15:45 ` Catalin Marinas 2018-06-19 15:53 ` Mark Rutland 2018-06-19 15:53 ` Mark Rutland 2018-06-18 12:03 ` [PATCHv3 14/19] kernel: add kcompat_sys_{f,}statfs64() Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-18 12:03 ` [PATCHv3 15/19] arm64: remove in-kernel call to sys_personality() Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:46 ` Catalin Marinas 2018-06-19 15:46 ` Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 16/19] arm64: use {COMPAT,}SYSCALL_DEFINE0 for sigreturn Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:48 ` Catalin Marinas 2018-06-19 15:48 ` [PATCHv3 16/19] arm64: use {COMPAT, }SYSCALL_DEFINE0 " Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 17/19] arm64: use SYSCALL_DEFINE6() for mmap Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:50 ` Catalin Marinas 2018-06-19 15:50 ` Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 18/19] arm64: convert compat wrappers to C Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 15:51 ` Catalin Marinas 2018-06-19 15:51 ` Catalin Marinas 2018-06-18 12:03 ` [PATCHv3 19/19] arm64: implement syscall wrappers Mark Rutland 2018-06-18 12:03 ` Mark Rutland 2018-06-19 16:13 ` Catalin Marinas 2018-06-19 16:13 ` Catalin Marinas 2018-06-19 15:38 ` [PATCHv3 00/19] arm64: invoke syscalls with pt_regs Mark Rutland 2018-06-19 15:38 ` Mark Rutland 2018-06-19 16:14 ` Catalin Marinas 2018-06-19 16:14 ` Catalin Marinas
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