From: Chen-Yu Tsai <wens@csie.org> To: Maxime Ripard <maxime.ripard@bootlin.com>, Lee Jones <lee.jones@linaro.org> Cc: devicetree@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>, linux-arm-kernel@lists.infradead.org, Icenowy Zheng <icenowy@aosc.io> Subject: [PATCH v3 4/5] arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices Date: Fri, 13 Jul 2018 00:04:51 +0800 [thread overview] Message-ID: <20180712160452.5516-5-wens@csie.org> (raw) In-Reply-To: <20180712160452.5516-1-wens@csie.org> Now that the device tree binding headers for the R_CCU have been merged, we can use the macros, instead of raw numbers. Switch to R_CCU macros for clock and reset indices. Reviewed-by: Icenowy Zheng <icenowy@aosc.io> Tested-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index c72da8cd9ef5..37c2e11fca2e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -5,7 +5,9 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun50i-h6-ccu.h> +#include <dt-bindings/clock/sun50i-h6-r-ccu.h> #include <dt-bindings/reset/sun50i-h6-ccu.h> +#include <dt-bindings/reset/sun50i-h6-r-ccu.h> / { interrupt-parent = <&gic>; @@ -198,7 +200,7 @@ reg = <0x07022000 0x400>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -215,8 +217,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07081400 0x400>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu 8>; - resets = <&r_ccu 4>; + clocks = <&r_ccu CLK_R_APB2_I2C>; + resets = <&r_ccu RST_R_APB2_I2C>; pinctrl-names = "default"; pinctrl-0 = <&r_i2c_pins>; status = "disabled"; -- 2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/5] arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices Date: Fri, 13 Jul 2018 00:04:51 +0800 [thread overview] Message-ID: <20180712160452.5516-5-wens@csie.org> (raw) In-Reply-To: <20180712160452.5516-1-wens@csie.org> Now that the device tree binding headers for the R_CCU have been merged, we can use the macros, instead of raw numbers. Switch to R_CCU macros for clock and reset indices. Reviewed-by: Icenowy Zheng <icenowy@aosc.io> Tested-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index c72da8cd9ef5..37c2e11fca2e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -5,7 +5,9 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun50i-h6-ccu.h> +#include <dt-bindings/clock/sun50i-h6-r-ccu.h> #include <dt-bindings/reset/sun50i-h6-ccu.h> +#include <dt-bindings/reset/sun50i-h6-r-ccu.h> / { interrupt-parent = <&gic>; @@ -198,7 +200,7 @@ reg = <0x07022000 0x400>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -215,8 +217,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07081400 0x400>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu 8>; - resets = <&r_ccu 4>; + clocks = <&r_ccu CLK_R_APB2_I2C>; + resets = <&r_ccu RST_R_APB2_I2C>; pinctrl-names = "default"; pinctrl-0 = <&r_i2c_pins>; status = "disabled"; -- 2.18.0
next prev parent reply other threads:[~2018-07-12 16:04 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-07-12 16:04 [PATCH v3 0/5] arm64: allwinner: h6: Enable AXP805 PMIC on Pine H64 Chen-Yu Tsai 2018-07-12 16:04 ` Chen-Yu Tsai 2018-07-12 16:04 ` [PATCH v3 1/5] dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806 Chen-Yu Tsai 2018-07-12 16:04 ` Chen-Yu Tsai 2018-07-13 7:52 ` Lee Jones 2018-07-13 7:52 ` Lee Jones 2018-07-12 16:04 ` [PATCH v3 2/5] mfd: axp20x: Add self-working mode support " Chen-Yu Tsai 2018-07-12 16:04 ` Chen-Yu Tsai 2018-07-13 7:53 ` Lee Jones 2018-07-13 7:53 ` Lee Jones 2018-07-12 16:04 ` [PATCH v3 3/5] mfd: axp20x: Support AXP806 in I2C mode Chen-Yu Tsai 2018-07-12 16:04 ` Chen-Yu Tsai 2018-07-13 7:53 ` Lee Jones 2018-07-13 7:53 ` Lee Jones 2018-07-12 16:04 ` Chen-Yu Tsai [this message] 2018-07-12 16:04 ` [PATCH v3 4/5] arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices Chen-Yu Tsai 2018-07-12 16:04 ` [PATCH v3 5/5] arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64 Chen-Yu Tsai 2018-07-12 16:04 ` Chen-Yu Tsai 2018-07-17 2:19 ` [PATCH v3 0/5] arm64: allwinner: h6: Enable " Chen-Yu Tsai 2018-07-17 2:19 ` Chen-Yu Tsai
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