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From: Vignesh R <vigneshr@ti.com>
To: Tony Lindgren <tony@atomide.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	<linux-omap@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Vignesh R <vigneshr@ti.com>
Subject: [PATCH v3 3/4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
Date: Tue, 24 Jul 2018 23:01:49 +0530	[thread overview]
Message-ID: <20180724173150.2701-4-vigneshr@ti.com> (raw)
In-Reply-To: <20180724173150.2701-1-vigneshr@ti.com>

Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
incorrectly documented in the TRM. In fact, the bit positions are
swapped. Update the DT bindings for PCIe EP to reflect the same.

Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
v3;
Add Fixes tag

 arch/arm/boot/dts/dra7.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1050da6c6d35..fc50d6a8e51a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -355,7 +355,7 @@
 				ti,hwmods = "pcie1";
 				phys = <&pcie1_phy>;
 				phy-names = "pcie-phy0";
-				ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
+				ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
 				status = "disabled";
 			};
 		};
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Vignesh R <vigneshr@ti.com>
To: Tony Lindgren <tony@atomide.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-omap@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Vignesh R <vigneshr@ti.com>
Subject: [PATCH v3 3/4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
Date: Tue, 24 Jul 2018 23:01:49 +0530	[thread overview]
Message-ID: <20180724173150.2701-4-vigneshr@ti.com> (raw)
In-Reply-To: <20180724173150.2701-1-vigneshr@ti.com>

Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
incorrectly documented in the TRM. In fact, the bit positions are
swapped. Update the DT bindings for PCIe EP to reflect the same.

Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
v3;
Add Fixes tag

 arch/arm/boot/dts/dra7.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1050da6c6d35..fc50d6a8e51a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -355,7 +355,7 @@
 				ti,hwmods = "pcie1";
 				phys = <&pcie1_phy>;
 				phy-names = "pcie-phy0";
-				ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
+				ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
 				status = "disabled";
 			};
 		};
-- 
2.18.0

  parent reply	other threads:[~2018-07-24 17:31 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-24 17:31 [PATCH v3 0/4] pci-dra7xx: Enable errata i870 workaround for RC mode Vignesh R
2018-07-24 17:31 ` Vignesh R
2018-07-24 17:31 ` [PATCH v3 1/4] dt-bindings: PCI: dra7xx: Add bindings for unaligned access in host mode Vignesh R
2018-07-24 17:31   ` Vignesh R
2018-07-24 17:31 ` [PATCH v3 2/4] ARM: dts: dra7: Enable workaround for errata i870 in PCIe " Vignesh R
2018-07-24 17:31   ` Vignesh R
2018-07-24 17:31 ` Vignesh R [this message]
2018-07-24 17:31   ` [PATCH v3 3/4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP Vignesh R
2018-07-24 17:31 ` [PATCH v3 4/4] pci: dwc: pci-dra7xx: Enable errata i870 for both EP and RC mode Vignesh R
2018-07-24 17:31   ` Vignesh R
2018-08-08 16:57 ` [PATCH v3 0/4] pci-dra7xx: Enable errata i870 workaround for " Lorenzo Pieralisi
2018-08-10 10:07   ` Vignesh R
2018-09-07 17:00     ` Tony Lindgren
2018-09-17  9:47       ` Lorenzo Pieralisi
2018-09-17 18:12         ` Vignesh R

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