From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Subject: [PATCH 7/8] drm/i915: Explicitly mark Global GTT address spaces
Date: Tue, 14 Aug 2018 15:40:57 +0100 [thread overview]
Message-ID: <20180814144058.19286-8-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20180814144058.19286-1-tvrtko.ursulin@linux.intel.com>
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
So far we have been relying on vm->file pointer being NULL to declare
something GGTT.
This has the unfortunate consequence that the default kernel context is
also declared GGTT and interferes with the following patch which wants to
instantiate VMA's and execute requests against the kernel context.
Change the is_ggtt test to use an explicit flag in struct address_space to
solve this issue.
Note that the bit used is free since there is an alignment hole in the
struct.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++
drivers/gpu/drm/i915/i915_gem_gtt.h | 5 ++++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4137af4bd8f5..64151ad2a02b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3610,6 +3610,8 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
mutex_lock(&dev_priv->drm.struct_mutex);
i915_address_space_init(&ggtt->vm, dev_priv);
+ ggtt->vm.is_ggtt = true;
+
/* Only VLV supports read-only GGTT mappings */
ggtt->vm.has_read_only = IS_VALLEYVIEW(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index dd161c187a68..d8dd4d9280bd 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -331,6 +331,9 @@ struct i915_address_space {
struct pagestash free_pages;
+ /* Global GTT */
+ bool is_ggtt:1;
+
/* Some systems require uncached updates of the page directories */
bool pt_kmap_wc:1;
@@ -364,7 +367,7 @@ struct i915_address_space {
I915_SELFTEST_DECLARE(bool scrub_64K);
};
-#define i915_is_ggtt(V) (!(V)->file)
+#define i915_is_ggtt(vm) ((vm)->is_ggtt)
static inline bool
i915_vm_is_48bit(const struct i915_address_space *vm)
--
2.17.1
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next prev parent reply other threads:[~2018-08-14 14:41 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-14 14:40 [PATCH v10 0/8] Per context dynamic (sub)slice power-gating Tvrtko Ursulin
2018-08-14 14:40 ` [PATCH 1/8] drm/i915: Program RPCS for Broadwell Tvrtko Ursulin
2018-08-14 14:40 ` [PATCH 2/8] drm/i915: Record the sseu configuration per-context & engine Tvrtko Ursulin
2018-08-14 14:40 ` [PATCH 3/8] drm/i915/perf: simplify configure all context function Tvrtko Ursulin
2018-08-14 14:40 ` [PATCH 4/8] drm/i915/perf: reuse intel_lrc ctx regs macro Tvrtko Ursulin
2018-08-14 14:40 ` [PATCH 5/8] drm/i915/perf: lock powergating configuration to default when active Tvrtko Ursulin
2018-08-14 14:59 ` Lionel Landwerlin
2018-08-15 11:58 ` Tvrtko Ursulin
2018-08-16 7:31 ` Tvrtko Ursulin
2018-08-16 9:56 ` Lionel Landwerlin
2018-08-14 14:40 ` [PATCH 6/8] drm/i915: Add global barrier support Tvrtko Ursulin
2018-08-14 14:59 ` Tvrtko Ursulin
2018-08-14 14:40 ` Tvrtko Ursulin [this message]
2018-08-14 14:40 ` [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace Tvrtko Ursulin
2018-08-14 14:59 ` Chris Wilson
2018-08-14 15:11 ` Lionel Landwerlin
2018-08-14 15:18 ` Chris Wilson
2018-08-14 16:05 ` Lionel Landwerlin
2018-08-14 16:09 ` Lionel Landwerlin
2018-08-14 18:44 ` Tvrtko Ursulin
2018-08-14 18:53 ` Chris Wilson
2018-08-15 9:12 ` Tvrtko Ursulin
2018-08-14 15:22 ` Chris Wilson
2018-08-15 11:51 ` Tvrtko Ursulin
2018-08-15 11:56 ` Chris Wilson
2018-08-14 14:45 ` [PATCH v10 0/8] Per context dynamic (sub)slice power-gating Tvrtko Ursulin
2018-08-14 15:15 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-08-14 15:19 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-08-14 15:32 ` ✓ Fi.CI.BAT: success " Patchwork
2018-08-14 20:22 ` ✗ Fi.CI.IGT: failure " Patchwork
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