From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: dri-devel@lists.freedesktop.org
Cc: "José Roberto de Souza" <jose.souza@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>
Subject: [libdrm] intel: Add a new CFL PCI ID.
Date: Tue, 14 Aug 2018 16:07:32 -0700 [thread overview]
Message-ID: <20180814230732.27276-1-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <d9d0995b39661041f6422b0eb61c5c76c3705575.camel@intel.com>
One more CFL ID added to spec.
Align with kernel commit d0e062ebb3a4 ("drm/i915/cfl:
Add a new CFL PCI ID.")
v2: fix commit subject.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
intel/intel_chipset.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 583d6447..4a34b7be 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -230,7 +230,8 @@
#define PCI_CHIP_COFFEELAKE_S_GT2_1 0x3E91
#define PCI_CHIP_COFFEELAKE_S_GT2_2 0x3E92
#define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96
-#define PCI_CHIP_COFFEELAKE_S_GT2_4 0x3E9A
+#define PCI_CHIP_COFFEELAKE_S_GT2_4 0x3E98
+#define PCI_CHIP_COFFEELAKE_S_GT2_5 0x3E9A
#define PCI_CHIP_COFFEELAKE_H_GT2_1 0x3E9B
#define PCI_CHIP_COFFEELAKE_H_GT2_2 0x3E94
#define PCI_CHIP_COFFEELAKE_U_GT2_1 0x3EA9
@@ -509,7 +510,8 @@
(devid) == PCI_CHIP_COFFEELAKE_S_GT2_1 || \
(devid) == PCI_CHIP_COFFEELAKE_S_GT2_2 || \
(devid) == PCI_CHIP_COFFEELAKE_S_GT2_3 || \
- (devid) == PCI_CHIP_COFFEELAKE_S_GT2_4)
+ (devid) == PCI_CHIP_COFFEELAKE_S_GT2_4 || \
+ (devid) == PCI_CHIP_COFFEELAKE_S_GT2_5)
#define IS_CFL_H(devid) ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \
(devid) == PCI_CHIP_COFFEELAKE_H_GT2_2)
--
2.17.1
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prev parent reply other threads:[~2018-08-14 23:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-09 5:41 [PATCH libdrm] drm/i915/cfl: Add a new CFL PCI ID Rodrigo Vivi
2018-08-09 19:48 ` Souza, Jose
2018-08-14 23:07 ` Rodrigo Vivi [this message]
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