[PULL] drm-intel-fixes

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

Hi Dave,

Here goes drm-intel-fixes-2018-09-05:

The critical fix here on display side is the DP MST regression one.
But this pull also include fixes for DP SST, small VDSC register fix
and GVT's bucked with "BXT fixes, two guest warning fixes, dmabuf
format mod fix and one for recent multiple VM timeout failure."

Thanks,
Rodrigo.

The following changes since commit 57361846b52bc686112da6ca5368d11210796804:

  Linux 4.19-rc2 (2018-09-02 14:37:30 -0700)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2018-09-05

for you to fetch changes up to 2b82435cb90bed2c5f8398730d964dd11602217c:

  drm/i915/dp_mst: Fix enabling pipe clock for all streams (2018-09-03 21:34:36 -0700)

----------------------------------------------------------------
The critical fix here on display side is the DP MST regression one.
But this pull also include fixes for DP SST, small VDSC register fix
and GVT's bucked with "BXT fixes, two guest warning fixes, dmabuf
format mod fix and one for recent multiple VM timeout failure."

----------------------------------------------------------------
Colin Xu (2):
      drm/i915/gvt: Make correct handling to vreg BXT_PHY_CTL_FAMILY
      drm/i915/gvt: Handle GEN9_WM_CHICKEN3 with F_CMD_ACCESS.

Hang Yuan (1):
      drm/i915/gvt: move intel_runtime_pm_get out of spin_lock in stop_schedule

Imre Deak (1):
      drm/i915/dp_mst: Fix enabling pipe clock for all streams

Jan-Marek Glogowski (1):
      drm/i915: Re-apply "Perform link quality check, unconditionally during long pulse"

Manasi Navare (1):
      drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine

Rodrigo Vivi (1):
      Merge tag 'gvt-fixes-2018-09-04' of https://github.com/intel/gvt-linux into drm-intel-fixes

Xiaolin Zhang (1):
      drm/i915/gvt: emulate gen9 dbuf ctl register access

Zhenyu Wang (2):
      drm/i915/gvt: Fix drm_format_mod value for vGPU plane
      drm/i915/gvt: Give new born vGPU higher scheduling chance

 drivers/gpu/drm/i915/gvt/dmabuf.c       | 33 ++++++++++++++++++++++-------
 drivers/gpu/drm/i915/gvt/fb_decoder.c   |  5 ++---
 drivers/gpu/drm/i915/gvt/fb_decoder.h   |  2 +-
 drivers/gpu/drm/i915/gvt/handlers.c     | 33 +++++++++++++++++++++++------
 drivers/gpu/drm/i915/gvt/mmio_context.c |  2 --
 drivers/gpu/drm/i915/gvt/sched_policy.c | 37 ++++++++++++++++++++++++++-------
 drivers/gpu/drm/i915/i915_reg.h         |  4 ++--
 drivers/gpu/drm/i915/intel_ddi.c        | 17 ++++++++-------
 drivers/gpu/drm/i915/intel_dp.c         | 33 ++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_dp_mst.c     |  4 ++++
 10 files changed, 120 insertions(+), 50 deletions(-)
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