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From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Rob Herring <robh@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
	Fan Chen <fan.chen@mediatek.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
	<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>
Subject: [PATCH v1 0/3] update Mediatek MT2712 clock
Date: Thu, 20 Sep 2018 17:57:23 +0800	[thread overview]
Message-ID: <20180920095727.11868-1-weiyi.lu@mediatek.com> (raw)

This series is based on v4.19-rc1.
Basically, it's for the 3rd ECO design change of MT2712.
And also add support for switching pll reference source
for some MT2712 projects.


WARNING: multiple messages have this Message-ID (diff)
From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Rob Herring <robh@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
	Fan Chen <fan.chen@mediatek.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-clk@vger.kernel.org, srv_heupstream@mediatek.com,
	Weiyi Lu <weiyi.lu@mediatek.com>
Subject: [PATCH v1 0/3] update Mediatek MT2712 clock
Date: Thu, 20 Sep 2018 17:57:23 +0800	[thread overview]
Message-ID: <20180920095727.11868-1-weiyi.lu@mediatek.com> (raw)

This series is based on v4.19-rc1.
Basically, it's for the 3rd ECO design change of MT2712.
And also add support for switching pll reference source
for some MT2712 projects.

WARNING: multiple messages have this Message-ID (diff)
From: weiyi.lu@mediatek.com (Weiyi Lu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 0/3] update Mediatek MT2712 clock
Date: Thu, 20 Sep 2018 17:57:23 +0800	[thread overview]
Message-ID: <20180920095727.11868-1-weiyi.lu@mediatek.com> (raw)

This series is based on v4.19-rc1.
Basically, it's for the 3rd ECO design change of MT2712.
And also add support for switching pll reference source
for some MT2712 projects.

             reply	other threads:[~2018-09-20  9:58 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-20  9:57 Weiyi Lu [this message]
2018-09-20  9:57 ` [PATCH v1 0/3] update Mediatek MT2712 clock Weiyi Lu
2018-09-20  9:57 ` Weiyi Lu
2018-09-20  9:57 ` Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57 ` [PATCH v1 1/3] dt-bindings: clock: add clock for MT2712 Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57 ` [PATCH v1 2/3] clk: mediatek: update clock driver of MT2712 Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57 ` [PATCH v1 3/3] clk: mediatek: mt2712: add pll reference support Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-09-20  9:57   ` Weiyi Lu
2018-10-12 17:53   ` Stephen Boyd
2018-10-12 17:53     ` Stephen Boyd
2018-10-12 17:53     ` Stephen Boyd
2018-10-17 13:53     ` [SPAM]Re: " Weiyi Lu
2018-10-17 13:53       ` Weiyi Lu
2018-10-17 14:15       ` Stephen Boyd
2018-10-17 14:15         ` Stephen Boyd
2018-10-18  6:00         ` Weiyi Lu
2018-10-18  6:00           ` Weiyi Lu
2018-10-18 17:05           ` Stephen Boyd
2018-10-18 17:05             ` Stephen Boyd

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