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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 11/12] drm/i915: Allow LP3 watermarks on ILK
Date: Wed, 10 Oct 2018 16:04:53 +0300	[thread overview]
Message-ID: <20181010130454.28557-12-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20181010130454.28557-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

ILK already has the watermark registers for the LP3 level so
bump num_levels to 4. The BIOS still does not provide memory
latency values for for LP3 though so it will not be used
unless the latency values are overridden via debugfs.

This also requires that we check for latency==0 zero when
computing the watermarks so that we keep disabling any wm
level which isn't supposed to be used. The behaviour now matches
that of the g4x/vlv wm code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7bd29bba81c1..dd5edd984fb5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2537,6 +2537,9 @@ static uint32_t ilk_compute_pri_wm(const struct intel_crtc_state *cstate,
 	uint32_t method1, method2;
 	int cpp;
 
+	if (latency == 0)
+		return USHRT_MAX;
+
 	if (!intel_wm_plane_visible(cstate, pstate))
 		return 0;
 
@@ -2564,6 +2567,9 @@ static uint32_t ilk_compute_spr_wm(const struct intel_crtc_state *cstate,
 	uint32_t method1, method2;
 	int cpp;
 
+	if (latency == 0)
+		return USHRT_MAX;
+
 	if (!intel_wm_plane_visible(cstate, pstate))
 		return 0;
 
@@ -2585,6 +2591,9 @@ static uint32_t ilk_compute_cur_wm(const struct intel_crtc_state *cstate,
 	int latency = intel_plane_wm_latency(plane, level);
 	int cpp;
 
+	if (latency == 0)
+		return USHRT_MAX;
+
 	if (!intel_wm_plane_visible(cstate, pstate))
 		return 0;
 
@@ -2953,10 +2962,8 @@ static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
 {
 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 		dev_priv->wm.num_levels = 5;
-	else if (INTEL_GEN(dev_priv) >= 6)
-		dev_priv->wm.num_levels = 4;
 	else
-		dev_priv->wm.num_levels = 3;
+		dev_priv->wm.num_levels = 4;
 
 	ilk_read_wm_latency(dev_priv, dev_priv->wm.pri_latency);
 	ilk_fixup_wm_latency_units(dev_priv, dev_priv->wm.pri_latency);
-- 
2.18.1

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  parent reply	other threads:[~2018-10-10 13:08 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-10 13:04 [PATCH 00/12] drm/i915: Clean up the wm mem latency stuff Ville Syrjala
2018-10-10 13:04 ` [PATCH 01/12] drm/i915: Store all wm memory latency values in .1 usec units Ville Syrjala
2018-10-10 13:12   ` Chris Wilson
2018-10-10 15:35     ` Ville Syrjälä
2018-10-26 18:14   ` [PATCH v2 " Ville Syrjala
2018-10-10 13:04 ` [PATCH 02/12] drm/i915: Use the spr/cur latencies on vlv/chv/g4x Ville Syrjala
2018-10-10 13:04 ` [PATCH 03/12] drm/i915: Eliminate skl_latency[] Ville Syrjala
2018-10-10 13:04 ` [PATCH 04/12] drm/i915: Add dev_priv->wm.num_levels and use it everywhere Ville Syrjala
2018-10-26 18:27   ` [PATCH v2 " Ville Syrjala
2018-10-10 13:04 ` [PATCH 05/12] drm/i915: Add DEFINE_SNPRINTF_ARRAY() Ville Syrjala
2018-10-11 12:14   ` Jani Nikula
2018-10-11 12:47     ` Ville Syrjälä
2018-10-11 16:07       ` Jani Nikula
2018-10-10 13:04 ` [PATCH 06/12] drm/i915: Make the WM memory latency print more compact Ville Syrjala
2018-10-10 13:04 ` [PATCH 07/12] drm/i915: Eliminate redundant ilk sprite/cursor wm fixup code Ville Syrjala
2018-10-10 13:04 ` [PATCH 08/12] drm/i915: Split skl+ and ilk+ read_wm_latency() Ville Syrjala
2018-10-26 18:45   ` [PATCH v2 " Ville Syrjala
2018-10-10 13:04 ` [PATCH 09/12] drm/i915: Sanitize wm latency values for ilk+ Ville Syrjala
2018-10-26 19:11   ` [PATCH v2 " Ville Syrjala
2018-10-10 13:04 ` [PATCH 10/12] drm/i915: Drop the funky ilk wm setup Ville Syrjala
2018-10-10 13:04 ` Ville Syrjala [this message]
2018-10-10 13:04 ` [PATCH 12/12] drm/i915: Remove the remnants of the ilk+ LP0 wm hack Ville Syrjala
2018-10-10 14:34 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up the wm mem latency stuff Patchwork
2018-10-10 14:38 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-10 14:50 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-26 18:17 ` ✗ Fi.CI.BAT: failure for drm/i915: Clean up the wm mem latency stuff (rev2) Patchwork
2018-10-26 18:37 ` ✗ Fi.CI.BAT: failure for drm/i915: Clean up the wm mem latency stuff (rev3) Patchwork
2018-10-26 19:01 ` ✗ Fi.CI.BAT: failure for drm/i915: Clean up the wm mem latency stuff (rev4) Patchwork
2018-10-26 19:29 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up the wm mem latency stuff (rev5) Patchwork
2018-10-26 19:34 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-26 19:47 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-27  5:17 ` ✓ Fi.CI.IGT: " Patchwork

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