From: Mark Brown <broonie@kernel.org> To: Hieu Tran Dang <dangtranhieu2012@gmail.com> Cc: Mark Brown <broonie@kernel.org>, Mark Brown <broonie@kernel.org>, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: Applied "spi: fsl-lpspi: Prevent FIFO under/overrun by default" to the spi tree Date: Wed, 10 Oct 2018 15:52:21 +0100 (BST) [thread overview] Message-ID: <20181010145221.A46C11122395@debutante.sirena.org.uk> (raw) In-Reply-To: <20181002110636.5052-1-dangtranhieu2012@gmail.com> The patch spi: fsl-lpspi: Prevent FIFO under/overrun by default has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From de8978c388c66b8fca192213ec9f0727e964c652 Mon Sep 17 00:00:00 2001 From: Hieu Tran Dang <dangtranhieu2012@gmail.com> Date: Tue, 2 Oct 2018 18:06:36 +0700 Subject: [PATCH] spi: fsl-lpspi: Prevent FIFO under/overrun by default Certain devices don't work well when a transmit FIFO underrun or receive FIFO overrun occurs. Example is the SAF400x radio chip when running at high speed which leads to garbage being sent to/received from the chip. In which case, it should stall waiting for further data to be available before proceeding. This patch unset the NOSTALL bit in CFGR1 by default to prevent this issue. Signed-off-by: Hieu Tran Dang <dangtranhieu2012@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-fsl-lpspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index e6d5cc6ab108..51670976faa3 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -276,7 +276,7 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) fsl_lpspi_set_watermark(fsl_lpspi); - temp = CFGR1_PCSCFG | CFGR1_MASTER | CFGR1_NOSTALL; + temp = CFGR1_PCSCFG | CFGR1_MASTER; if (fsl_lpspi->config.mode & SPI_CS_HIGH) temp |= CFGR1_PCSPOL; writel(temp, fsl_lpspi->base + IMX7ULP_CFGR1); -- 2.19.0.rc2
WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org> To: Hieu Tran Dang <dangtranhieu2012@gmail.com> Cc: Mark Brown <broonie@kernel.org>, Mark Brown <broonie@kernel.org>, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: Applied "spi: fsl-lpspi: Prevent FIFO under/overrun by default" to the spi tree Date: Wed, 10 Oct 2018 15:52:21 +0100 (BST) [thread overview] Message-ID: <20181010145221.A46C11122395@debutante.sirena.org.uk> (raw) In-Reply-To: <20181002110636.5052-1-dangtranhieu2012@gmail.com> The patch spi: fsl-lpspi: Prevent FIFO under/overrun by default has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From de8978c388c66b8fca192213ec9f0727e964c652 Mon Sep 17 00:00:00 2001 From: Hieu Tran Dang <dangtranhieu2012@gmail.com> Date: Tue, 2 Oct 2018 18:06:36 +0700 Subject: [PATCH] spi: fsl-lpspi: Prevent FIFO under/overrun by default Certain devices don't work well when a transmit FIFO underrun or receive FIFO overrun occurs. Example is the SAF400x radio chip when running at high speed which leads to garbage being sent to/received from the chip. In which case, it should stall waiting for further data to be available before proceeding. This patch unset the NOSTALL bit in CFGR1 by default to prevent this issue. Signed-off-by: Hieu Tran Dang <dangtranhieu2012@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-fsl-lpspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index e6d5cc6ab108..51670976faa3 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -276,7 +276,7 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) fsl_lpspi_set_watermark(fsl_lpspi); - temp = CFGR1_PCSCFG | CFGR1_MASTER | CFGR1_NOSTALL; + temp = CFGR1_PCSCFG | CFGR1_MASTER; if (fsl_lpspi->config.mode & SPI_CS_HIGH) temp |= CFGR1_PCSPOL; writel(temp, fsl_lpspi->base + IMX7ULP_CFGR1); -- 2.19.0.rc2
next prev parent reply other threads:[~2018-10-10 14:52 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-02 11:06 [PATCH] spi: fsl-lpspi: Prevent FIFO under/overrun by default Hieu Tran Dang 2018-10-10 14:52 ` Mark Brown [this message] 2018-10-10 14:52 ` Applied "spi: fsl-lpspi: Prevent FIFO under/overrun by default" to the spi tree Mark Brown
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