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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: lucas.demarchi@intel.com, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [RFC 6/8] drm/i915: Consolidate cdclk hooks.
Date: Thu, 18 Oct 2018 16:34:45 -0700	[thread overview]
Message-ID: <20181018233447.5187-7-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20181018233447.5187-1-rodrigo.vivi@intel.com>

We don't need 2 different blocks.
Specially with on in ordered older-to-newer and the other
one newer-to-older.

Let's start always using newer-to-older order
when it makes sense.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c | 91 ++++++++++++++----------------
 1 file changed, 42 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index 915e2c93412b..36db1fad160b 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2777,80 +2777,73 @@ void intel_update_rawclk(struct drm_i915_private *dev_priv)
  */
 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
 {
-	if (IS_CHERRYVIEW(dev_priv)) {
-		dev_priv->display.set_cdclk = chv_set_cdclk;
-		dev_priv->display.modeset_calc_cdclk =
-			vlv_modeset_calc_cdclk;
-	} else if (IS_VALLEYVIEW(dev_priv)) {
-		dev_priv->display.set_cdclk = vlv_set_cdclk;
-		dev_priv->display.modeset_calc_cdclk =
-			vlv_modeset_calc_cdclk;
-	} else if (IS_BROADWELL(dev_priv)) {
-		dev_priv->display.set_cdclk = bdw_set_cdclk;
-		dev_priv->display.modeset_calc_cdclk =
-			bdw_modeset_calc_cdclk;
-	} else if (IS_GEN9_LP(dev_priv)) {
-		dev_priv->display.set_cdclk = bxt_set_cdclk;
-		dev_priv->display.modeset_calc_cdclk =
-			bxt_modeset_calc_cdclk;
-	} else if (IS_GEN9_BC(dev_priv)) {
-		dev_priv->display.set_cdclk = skl_set_cdclk;
-		dev_priv->display.modeset_calc_cdclk =
-			skl_modeset_calc_cdclk;
+	if (INTEL_GEN(dev_priv) >= 11) {
+		dev_priv->display.set_cdclk = icl_set_cdclk;
+		dev_priv->display.modeset_calc_cdclk = icl_modeset_calc_cdclk;
+		dev_priv->display.get_cdclk = icl_get_cdclk;
 	} else if (IS_GEN10(dev_priv)) {
 		dev_priv->display.set_cdclk = cnl_set_cdclk;
 		dev_priv->display.modeset_calc_cdclk =
 			cnl_modeset_calc_cdclk;
-	} else if (INTEL_GEN(dev_priv) >= 11) {
-		dev_priv->display.set_cdclk = icl_set_cdclk;
-		dev_priv->display.modeset_calc_cdclk = icl_modeset_calc_cdclk;
-	}
-
-	if (INTEL_GEN(dev_priv) >= 11)
-		dev_priv->display.get_cdclk = icl_get_cdclk;
-	else if (IS_GEN10(dev_priv))
 		dev_priv->display.get_cdclk = cnl_get_cdclk;
-	else if (IS_GEN9_BC(dev_priv))
+	} else if (IS_GEN9_BC(dev_priv)) {
+		dev_priv->display.set_cdclk = skl_set_cdclk;
+		dev_priv->display.modeset_calc_cdclk =
+			skl_modeset_calc_cdclk;
 		dev_priv->display.get_cdclk = skl_get_cdclk;
-	else if (IS_GEN9_LP(dev_priv))
+	} else if (IS_GEN9_LP(dev_priv)) {
+		dev_priv->display.set_cdclk = bxt_set_cdclk;
+		dev_priv->display.modeset_calc_cdclk =
+			bxt_modeset_calc_cdclk;
 		dev_priv->display.get_cdclk = bxt_get_cdclk;
-	else if (IS_BROADWELL(dev_priv))
+	} else if (IS_BROADWELL(dev_priv)) {
+		dev_priv->display.set_cdclk = bdw_set_cdclk;
+		dev_priv->display.modeset_calc_cdclk =
+			bdw_modeset_calc_cdclk;
 		dev_priv->display.get_cdclk = bdw_get_cdclk;
-	else if (IS_HASWELL(dev_priv))
+	} else if (IS_HASWELL(dev_priv)) {
 		dev_priv->display.get_cdclk = hsw_get_cdclk;
-	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+	} else if (IS_CHERRYVIEW(dev_priv)) {
+		dev_priv->display.set_cdclk = chv_set_cdclk;
+		dev_priv->display.modeset_calc_cdclk =
+			vlv_modeset_calc_cdclk;
 		dev_priv->display.get_cdclk = vlv_get_cdclk;
-	else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
+	} else if (IS_VALLEYVIEW(dev_priv)) {
+		dev_priv->display.set_cdclk = vlv_set_cdclk;
+		dev_priv->display.modeset_calc_cdclk =
+			vlv_modeset_calc_cdclk;
+		dev_priv->display.get_cdclk = vlv_get_cdclk;
+	} else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
-	else if (IS_GEN5(dev_priv))
+	} else if (IS_GEN5(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
-	else if (IS_GM45(dev_priv))
+	} else if (IS_GM45(dev_priv)) {
 		dev_priv->display.get_cdclk = gm45_get_cdclk;
-	else if (IS_G45(dev_priv))
+	} else if (IS_G45(dev_priv)) {
 		dev_priv->display.get_cdclk = g33_get_cdclk;
-	else if (IS_I965GM(dev_priv))
+	} else if (IS_I965GM(dev_priv)) {
 		dev_priv->display.get_cdclk = i965gm_get_cdclk;
-	else if (IS_I965G(dev_priv))
+	} else if (IS_I965G(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
-	else if (IS_PINEVIEW(dev_priv))
+	} else if (IS_PINEVIEW(dev_priv)) {
 		dev_priv->display.get_cdclk = pnv_get_cdclk;
-	else if (IS_G33(dev_priv))
+	} else if (IS_G33(dev_priv)) {
 		dev_priv->display.get_cdclk = g33_get_cdclk;
-	else if (IS_I945GM(dev_priv))
+	} else if (IS_I945GM(dev_priv)) {
 		dev_priv->display.get_cdclk = i945gm_get_cdclk;
-	else if (IS_I945G(dev_priv))
+	} else if (IS_I945G(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
-	else if (IS_I915GM(dev_priv))
+	} else if (IS_I915GM(dev_priv)) {
 		dev_priv->display.get_cdclk = i915gm_get_cdclk;
-	else if (IS_I915G(dev_priv))
+	} else if (IS_I915G(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk;
-	else if (IS_I865G(dev_priv))
+	} else if (IS_I865G(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk;
-	else if (IS_I85X(dev_priv))
+	} else if (IS_I85X(dev_priv)) {
 		dev_priv->display.get_cdclk = i85x_get_cdclk;
-	else if (IS_I845G(dev_priv))
+	} else if (IS_I845G(dev_priv)) {
 		dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
-	else { /* 830 */
+	} else { /* 830 */
 		WARN(!IS_I830(dev_priv),
 		     "Unknown platform. Assuming 133 MHz CDCLK\n");
 		dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk;
-- 
2.19.1

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  parent reply	other threads:[~2018-10-18 23:35 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-18 23:34 [RFC 0/8] re-organize a bit gen10 and gen11 Rodrigo Vivi
2018-10-18 23:34 ` [RFC 1/8] drm/i915: Make number of ddi ports explicit Rodrigo Vivi
2018-10-18 23:34 ` [RFC 2/8] drm/i915: Use the ddi_ports info to kill ugly CNL_WITH_PORT_F Rodrigo Vivi
2018-10-19  7:39   ` Jani Nikula
2018-10-19  8:27     ` Daniel Vetter
2018-10-19 16:46     ` Lucas De Marchi
2018-10-19 17:40       ` Rodrigo Vivi
2018-10-18 23:34 ` [RFC 3/8] drm/i915/gen10: Prefer gen number than platform codename Rodrigo Vivi
2018-10-19  7:48   ` Jani Nikula
2018-10-19 10:37   ` Ville Syrjälä
2018-10-18 23:34 ` [RFC 4/8] drm/i915: Group gen 10 display Rodrigo Vivi
2018-10-19  8:03   ` Jani Nikula
2018-10-19  8:30     ` Daniel Vetter
2018-10-19  9:32       ` Joonas Lahtinen
2018-10-19 10:33       ` Ville Syrjälä
2018-10-19 16:41         ` Rodrigo Vivi
2018-10-19 17:45           ` Ville Syrjälä
2018-10-19 16:59         ` Lucas De Marchi
2018-10-19 16:52     ` Lucas De Marchi
2018-10-18 23:34 ` [RFC 5/8] drm/i915/gen11+: Prefer gen over platform codename Rodrigo Vivi
2018-10-19  8:05   ` Jani Nikula
2018-10-18 23:34 ` Rodrigo Vivi [this message]
2018-10-18 23:34 ` [RFC 7/8] drm/i915: Sort platform if cases from newer-to-older Rodrigo Vivi
2018-10-19  8:07   ` Jani Nikula
2018-10-18 23:34 ` [RFC 8/8] drm/i915: Simplify intel_has_sagv function Rodrigo Vivi
2018-10-19  8:15   ` Jani Nikula
2018-10-18 23:47 ` ✗ Fi.CI.CHECKPATCH: warning for re-organize a bit gen10 and gen11 Patchwork
2018-10-18 23:50 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-19  0:04 ` ✗ Fi.CI.BAT: failure " Patchwork

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