From: Yuantian Tang <andy.tang@nxp.com> To: shawnguo@kernel.org Cc: leoyang.li@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, Yuantian Tang <andy.tang@nxp.com> Subject: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support Date: Wed, 31 Oct 2018 12:47:42 +0800 [thread overview] Message-ID: <20181031044742.26327-1-andy.tang@nxp.com> (raw) Ls208xa has several thermal sensors. Add all the sensor id to dts to enable them. To make the dts cleaner, re-organize the nodes to split out the common part so that it can be shared with other SoCs. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 8 +- arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 8 +- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 83 +++----- arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 +++++++++++++++++++++++ 7 files changed, 591 insertions(+), 56 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index f9c1d30..8f9788c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -12,7 +12,7 @@ #include "fsl-ls208xa.dtsi" &cpu { - cpu0: cpu@0 { + cooling_map0: cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x0>; @@ -32,7 +32,7 @@ #cooling-cells = <2>; }; - cpu2: cpu@100 { + cooling_map1: cpu2: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x100>; @@ -52,7 +52,7 @@ #cooling-cells = <2>; }; - cpu4: cpu@200 { + cooling_map2: cpu4: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x200>; @@ -72,7 +72,7 @@ #cooling-cells = <2>; }; - cpu6: cpu@300 { + cooling_map3: cpu6: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x300>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi index 7c882da..013fe16 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi @@ -12,7 +12,7 @@ #include "fsl-ls208xa.dtsi" &cpu { - cpu0: cpu@0 { + cooling_map0: cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x0>; @@ -32,7 +32,7 @@ #cooling-cells = <2>; }; - cpu2: cpu@100 { + cooling_map1: cpu2: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x100>; @@ -52,7 +52,7 @@ #cooling-cells = <2>; }; - cpu4: cpu@200 { + cooling_map2: cpu4: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x200>; @@ -72,7 +72,7 @@ #cooling-cells = <2>; }; - cpu6: cpu@300 { + cooling_map3: cpu6: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x300>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 8cb78dd..4102317 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -75,54 +75,7 @@ mask = <0x2>; }; - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <5000>; - - thermal-sensors = <&tmu 4>; - - trips { - cpu_alert: cpu-alert { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu-crit { - temperature = <85000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map1 { - trip = <&cpu_alert>; - cooling-device = - <&cpu2 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map2 { - trip = <&cpu_alert>; - cooling-device = - <&cpu4 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map3 { - trip = <&cpu_alert>; - cooling-device = - <&cpu6 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - }; - }; - }; + #include "fsl-tmu.dtsi" timer { compatible = "arm,armv8-timer"; @@ -692,6 +645,7 @@ <0000 0 0 4 &gic 0 0 0 127 4>; }; + sata0: sata@3200000 { status = "disabled"; compatible = "fsl,ls2080a-ahci"; @@ -758,3 +712,36 @@ }; }; }; + +#include "fsl-tmu-map1.dtsi" +#include "fsl-tmu-map2.dtsi" +#include "fsl-tmu-map3.dtsi" +&thermal_zones { + thermal-zone1 { + status = "okay"; + }; + + thermal-zone2{ + status = "okay"; + }; + + thermal-zone3{ + status = "okay"; + }; + + thermal-zone4{ + status = "okay"; + }; + + thermal-zone5{ + status = "okay"; + }; + + thermal-zone6{ + status = "okay"; + }; + + thermal-zone7 { + status = "okay"; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi new file mode 100644 index 0000000..87e0d2e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map1 { + trip = <&alert0>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map1 { + trip = <&alert1>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map1 { + trip = <&alert2>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map1 { + trip = <&alert3>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map1 { + trip = <&alert4>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map1 { + trip = <&alert5>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map1 { + trip = <&alert6>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map1 { + trip = <&alert7>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi new file mode 100644 index 0000000..7e35073 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map2 { + trip = <&alert0>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map2 { + trip = <&alert1>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map2 { + trip = <&alert2>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map2 { + trip = <&alert3>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map2 { + trip = <&alert4>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map2 { + trip = <&alert5>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map2 { + trip = <&alert6>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map2 { + trip = <&alert7>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi new file mode 100644 index 0000000..dcde943 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map3 { + trip = <&alert0>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map3 { + trip = <&alert1>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map3 { + trip = <&alert2>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map3 { + trip = <&alert3>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map3 { + trip = <&alert4>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map3 { + trip = <&alert5>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map3 { + trip = <&alert6>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map3 { + trip = <&alert7>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi new file mode 100644 index 0000000..133d2dc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +thermal_zones: thermal-zones { + thermal_zone0: thermal-zone0 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 0>; + status = "disabled"; + + trips { + alert0: alert0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit0: crit0 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert0>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 1>; + status = "disabled"; + + trips { + alert1: alert1 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit1: crit1 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert1>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 2>; + status = "disabled"; + + trips { + alert2: alert2 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit2: crit2 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert2>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 3>; + status = "disabled"; + + trips { + alert3: alert3 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit3: crit3 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert3>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 4>; + status = "disabled"; + + trips { + alert4: alert4 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit4: crit4 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert4>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 5>; + status = "disabled"; + + trips { + alert5: alert5 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit5: crit5 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert5>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 6>; + status = "disabled"; + + trips { + alert6: alert6 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit6: crit6 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert6>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 7>; + status = "disabled"; + + trips { + alert7: alert7 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit7: crit7 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert7>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; -- 1.7.1
WARNING: multiple messages have this Message-ID (diff)
From: andy.tang@nxp.com (Yuantian Tang) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support Date: Wed, 31 Oct 2018 12:47:42 +0800 [thread overview] Message-ID: <20181031044742.26327-1-andy.tang@nxp.com> (raw) Ls208xa has several thermal sensors. Add all the sensor id to dts to enable them. To make the dts cleaner, re-organize the nodes to split out the common part so that it can be shared with other SoCs. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 8 +- arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 8 +- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 83 +++----- arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi | 99 +++++++++ arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 +++++++++++++++++++++++ 7 files changed, 591 insertions(+), 56 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index f9c1d30..8f9788c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -12,7 +12,7 @@ #include "fsl-ls208xa.dtsi" &cpu { - cpu0: cpu at 0 { + cooling_map0: cpu0: cpu at 0 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x0>; @@ -32,7 +32,7 @@ #cooling-cells = <2>; }; - cpu2: cpu at 100 { + cooling_map1: cpu2: cpu at 100 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x100>; @@ -52,7 +52,7 @@ #cooling-cells = <2>; }; - cpu4: cpu at 200 { + cooling_map2: cpu4: cpu at 200 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x200>; @@ -72,7 +72,7 @@ #cooling-cells = <2>; }; - cpu6: cpu at 300 { + cooling_map3: cpu6: cpu at 300 { device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0x300>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi index 7c882da..013fe16 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi @@ -12,7 +12,7 @@ #include "fsl-ls208xa.dtsi" &cpu { - cpu0: cpu at 0 { + cooling_map0: cpu0: cpu at 0 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x0>; @@ -32,7 +32,7 @@ #cooling-cells = <2>; }; - cpu2: cpu at 100 { + cooling_map1: cpu2: cpu at 100 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x100>; @@ -52,7 +52,7 @@ #cooling-cells = <2>; }; - cpu4: cpu at 200 { + cooling_map2: cpu4: cpu at 200 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x200>; @@ -72,7 +72,7 @@ #cooling-cells = <2>; }; - cpu6: cpu at 300 { + cooling_map3: cpu6: cpu at 300 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x300>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 8cb78dd..4102317 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -75,54 +75,7 @@ mask = <0x2>; }; - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <5000>; - - thermal-sensors = <&tmu 4>; - - trips { - cpu_alert: cpu-alert { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu-crit { - temperature = <85000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map1 { - trip = <&cpu_alert>; - cooling-device = - <&cpu2 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map2 { - trip = <&cpu_alert>; - cooling-device = - <&cpu4 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - map3 { - trip = <&cpu_alert>; - cooling-device = - <&cpu6 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - }; - }; - }; + #include "fsl-tmu.dtsi" timer { compatible = "arm,armv8-timer"; @@ -692,6 +645,7 @@ <0000 0 0 4 &gic 0 0 0 127 4>; }; + sata0: sata at 3200000 { status = "disabled"; compatible = "fsl,ls2080a-ahci"; @@ -758,3 +712,36 @@ }; }; }; + +#include "fsl-tmu-map1.dtsi" +#include "fsl-tmu-map2.dtsi" +#include "fsl-tmu-map3.dtsi" +&thermal_zones { + thermal-zone1 { + status = "okay"; + }; + + thermal-zone2{ + status = "okay"; + }; + + thermal-zone3{ + status = "okay"; + }; + + thermal-zone4{ + status = "okay"; + }; + + thermal-zone5{ + status = "okay"; + }; + + thermal-zone6{ + status = "okay"; + }; + + thermal-zone7 { + status = "okay"; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi new file mode 100644 index 0000000..87e0d2e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map1 { + trip = <&alert0>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map1 { + trip = <&alert1>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map1 { + trip = <&alert2>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map1 { + trip = <&alert3>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map1 { + trip = <&alert4>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map1 { + trip = <&alert5>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map1 { + trip = <&alert6>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map1 { + trip = <&alert7>; + cooling-device = + <&cooling_map1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi new file mode 100644 index 0000000..7e35073 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map2 { + trip = <&alert0>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map2 { + trip = <&alert1>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map2 { + trip = <&alert2>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map2 { + trip = <&alert3>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map2 { + trip = <&alert4>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map2 { + trip = <&alert5>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map2 { + trip = <&alert6>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map2 { + trip = <&alert7>; + cooling-device = + <&cooling_map2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi new file mode 100644 index 0000000..dcde943 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +&thermal_zones { + thermal-zone0 { + cooling-maps { + map3 { + trip = <&alert0>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + cooling-maps { + map3 { + trip = <&alert1>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + cooling-maps { + map3 { + trip = <&alert2>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + cooling-maps { + map3 { + trip = <&alert3>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + cooling-maps { + map3 { + trip = <&alert4>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + cooling-maps { + map3 { + trip = <&alert5>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + cooling-maps { + map3 { + trip = <&alert6>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + cooling-maps { + map3 { + trip = <&alert7>; + cooling-device = + <&cooling_map3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi new file mode 100644 index 0000000..133d2dc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Thermal Monitor Unit. + * + * Copyright 2018 NXP + * + * Tang Yuantian <andy.tang@nxp.com> + * + */ + +thermal_zones: thermal-zones { + thermal_zone0: thermal-zone0 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 0>; + status = "disabled"; + + trips { + alert0: alert0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit0: crit0 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert0>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone1 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 1>; + status = "disabled"; + + trips { + alert1: alert1 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit1: crit1 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert1>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone2 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 2>; + status = "disabled"; + + trips { + alert2: alert2 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit2: crit2 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert2>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone3 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 3>; + status = "disabled"; + + trips { + alert3: alert3 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit3: crit3 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert3>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone4 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 4>; + status = "disabled"; + + trips { + alert4: alert4 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit4: crit4 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert4>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone5 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 5>; + status = "disabled"; + + trips { + alert5: alert5 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit5: crit5 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert5>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone6 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 6>; + status = "disabled"; + + trips { + alert6: alert6 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit6: crit6 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert6>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + thermal-zone7 { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 7>; + status = "disabled"; + + trips { + alert7: alert7 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + crit7: crit7 { + temperature = <85000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&alert7>; + cooling-device = + <&cooling_map0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; +}; -- 1.7.1
next reply other threads:[~2018-10-31 4:51 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-31 4:47 Yuantian Tang [this message] 2018-10-31 4:47 ` [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support Yuantian Tang 2018-12-18 7:01 ` Andy Tang 2018-12-18 7:01 ` Andy Tang 2018-12-18 7:01 ` Andy Tang 2018-12-19 4:08 ` Shawn Guo 2018-12-19 4:08 ` Shawn Guo 2018-12-19 4:08 ` Shawn Guo 2018-12-20 3:12 ` Andy Tang 2018-12-20 3:12 ` Andy Tang 2018-12-20 3:12 ` Andy Tang
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