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From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: linux@armlinux.org.uk, bp@alien8.de, arnd@arndb.de,
	jlu@pengutronix.de, gregory.clement@bootlin.com
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	Chris Packham <chris.packham@alliedtelesis.co.nz>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding
Date: Fri,  9 Nov 2018 20:03:45 +1300	[thread overview]
Message-ID: <20181109070349.20464-6-chris.packham@alliedtelesis.co.nz> (raw)
In-Reply-To: <20181109070349.20464-1-chris.packham@alliedtelesis.co.nz>

Add documentation for the marvell,ecc-enable and marvell,ecc-disable
properties which can be used to enable/disable ECC on the Marvell aurora
cache.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    Changes in v6:
    - new (split binding doc from implementation).

 Documentation/devicetree/bindings/arm/l2c2x0.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.txt b/Documentation/devicetree/bindings/arm/l2c2x0.txt
index fbe6cb21f4cf..15a84f0ba9f1 100644
--- a/Documentation/devicetree/bindings/arm/l2c2x0.txt
+++ b/Documentation/devicetree/bindings/arm/l2c2x0.txt
@@ -76,6 +76,8 @@ Optional properties:
   specified to indicate that such transforms are precluded.
 - arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310).
 - arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).
+- marvell,ecc-enable : enable ECC protection on the L2 cache
+- marvell,ecc-disable : disable ECC protection on the L2 cache
 - arm,outer-sync-disable : disable the outer sync operation on the L2 cache.
   Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that
   will randomly hang unless outer sync operations are disabled.
-- 
2.19.1

WARNING: multiple messages have this Message-ID (diff)
From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: linux@armlinux.org.uk, bp@alien8.de, arnd@arndb.de,
	jlu@pengutronix.de, gregory.clement@bootlin.com
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	Chris Packham <chris.packham@alliedtelesis.co.nz>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: [v6,5/9] dt-bindings: ARM: document marvell,ecc-enable binding
Date: Fri,  9 Nov 2018 20:03:45 +1300	[thread overview]
Message-ID: <20181109070349.20464-6-chris.packham@alliedtelesis.co.nz> (raw)

Add documentation for the marvell,ecc-enable and marvell,ecc-disable
properties which can be used to enable/disable ECC on the Marvell aurora
cache.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    Changes in v6:
    - new (split binding doc from implementation).

 Documentation/devicetree/bindings/arm/l2c2x0.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.txt b/Documentation/devicetree/bindings/arm/l2c2x0.txt
index fbe6cb21f4cf..15a84f0ba9f1 100644
--- a/Documentation/devicetree/bindings/arm/l2c2x0.txt
+++ b/Documentation/devicetree/bindings/arm/l2c2x0.txt
@@ -76,6 +76,8 @@ Optional properties:
   specified to indicate that such transforms are precluded.
 - arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310).
 - arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).
+- marvell,ecc-enable : enable ECC protection on the L2 cache
+- marvell,ecc-disable : disable ECC protection on the L2 cache
 - arm,outer-sync-disable : disable the outer sync operation on the L2 cache.
   Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that
   will randomly hang unless outer sync operations are disabled.

WARNING: multiple messages have this Message-ID (diff)
From: chris.packham@alliedtelesis.co.nz (Chris Packham)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding
Date: Fri,  9 Nov 2018 20:03:45 +1300	[thread overview]
Message-ID: <20181109070349.20464-6-chris.packham@alliedtelesis.co.nz> (raw)
In-Reply-To: <20181109070349.20464-1-chris.packham@alliedtelesis.co.nz>

Add documentation for the marvell,ecc-enable and marvell,ecc-disable
properties which can be used to enable/disable ECC on the Marvell aurora
cache.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    Changes in v6:
    - new (split binding doc from implementation).

 Documentation/devicetree/bindings/arm/l2c2x0.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.txt b/Documentation/devicetree/bindings/arm/l2c2x0.txt
index fbe6cb21f4cf..15a84f0ba9f1 100644
--- a/Documentation/devicetree/bindings/arm/l2c2x0.txt
+++ b/Documentation/devicetree/bindings/arm/l2c2x0.txt
@@ -76,6 +76,8 @@ Optional properties:
   specified to indicate that such transforms are precluded.
 - arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310).
 - arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).
+- marvell,ecc-enable : enable ECC protection on the L2 cache
+- marvell,ecc-disable : disable ECC protection on the L2 cache
 - arm,outer-sync-disable : disable the outer sync operation on the L2 cache.
   Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that
   will randomly hang unless outer sync operations are disabled.
-- 
2.19.1

  parent reply	other threads:[~2018-11-09  7:04 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-09  7:03 [PATCH v6 0/9] EDAC drivers for Armada XP L2 and DDR Chris Packham
2018-11-09  7:03 ` Chris Packham
2018-11-09  7:03 ` [PATCH v6 1/9] ARM: l2c: move cache-aurora-l2.h to asm/hardware Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,1/9] " Chris Packham
2018-11-09  7:03 ` [PATCH v6 2/9] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,2/9] " Chris Packham
2018-11-09  7:03 ` [PATCH v6 3/9] ARM: aurora-l2: add defines for parity and ECC registers Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,3/9] " Chris Packham
2018-11-09  7:03 ` [PATCH v6 4/9] ARM: l2x0: support parity-enable/disable on aurora Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,4/9] " Chris Packham
2018-11-09  7:03 ` Chris Packham [this message]
2018-11-09  7:03   ` [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding Chris Packham
2018-11-09  7:03   ` [v6,5/9] " Chris Packham
2018-11-09 11:40   ` [PATCH v6 5/9] " Arnd Bergmann
2018-11-09 11:40     ` [PATCH v6 5/9] dt-bindings: ARM: document marvell, ecc-enable binding Arnd Bergmann
2018-11-09 11:40     ` [v6,5/9] dt-bindings: ARM: document marvell,ecc-enable binding Arnd Bergmann
2018-11-09 11:48     ` [PATCH v6 5/9] " Russell King - ARM Linux
2018-11-09 11:48       ` Russell King - ARM Linux
2018-11-09 11:48       ` [v6,5/9] " Russell King - ARM Linux
2018-11-09 15:58       ` [PATCH v6 5/9] " Arnd Bergmann
2018-11-09 15:58         ` [PATCH v6 5/9] dt-bindings: ARM: document marvell, ecc-enable binding Arnd Bergmann
2018-11-09 15:58         ` [v6,5/9] dt-bindings: ARM: document marvell,ecc-enable binding Arnd Bergmann
2018-11-11 19:57         ` [PATCH v6 5/9] " Chris Packham
2018-11-11 19:57           ` Chris Packham
2018-11-11 19:57           ` [v6,5/9] " Chris Packham
2018-11-11 22:35   ` [PATCH v6 5/9] " Rob Herring
2018-11-11 22:35     ` Rob Herring
2018-11-11 22:35     ` Rob Herring
2018-11-11 22:35     ` [v6,5/9] " Rob Herring
2018-11-09  7:03 ` [PATCH v6 6/9] ARM: l2x0: add marvell,ecc-enable property for aurora Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,6/9] " Chris Packham
2018-11-09  7:03 ` [PATCH v6 7/9] EDAC: Add missing debugfs_create_x32 wrapper Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,7/9] " Chris Packham
2018-11-09  7:03 ` [PATCH v6 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,8/9] " Chris Packham
2018-11-11 19:40   ` [PATCH v6 8/9] " Borislav Petkov
2018-11-11 19:40     ` Borislav Petkov
2018-11-11 19:40     ` [v6,8/9] " Borislav Petkov
2018-11-09  7:03 ` [PATCH v6 9/9] EDAC: armada_xp: Add support for more SoCs Chris Packham
2018-11-09  7:03   ` Chris Packham
2018-11-09  7:03   ` [v6,9/9] " Chris Packham

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